Model & design A 2-bit adder base on cmos technology /
A 2-bit Full Adder is widely used combination logic circuit. It summing two 1 bit binary number and 1 bit carry in together and given two 1 bit binary number as output. The multiples number of full Adder can be connecter together to build the adder which can sum more binary number (N-bit Adder). Thi...
שמור ב:
| מחבר ראשי: | |
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| פורמט: | Thesis ספר |
| שפה: | English |
| יצא לאור: |
2004.
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| תגים: |
הוספת תג
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| סיכום: | A 2-bit Full Adder is widely used combination logic circuit. It summing two 1 bit binary number and 1 bit carry in together and given two 1 bit binary number as output. The multiples number of full Adder can be connecter together to build the adder which can sum more binary number (N-bit Adder). This circuit is frequently used especially in the ALU unit of the microprocessor. The objective of this project is to design a CMOS 2-bit Full Adder base on CMOS technology. The major advantage of the CMOS technology is it consumes very low, high yield, low cost and dense packing. The 2-bit Adder designed in this project was laying out using LASI and simulated using WinSPICE under the BISM3v3 level 8 MOSFET model. The final result of this project is the layout of 2-bit Full Adder which can be used to making the mask for IC fabrications. |
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| תיאור פיזי: | 75 leaves : ill. ; 30cm. |