Saxena, P., Shelar, R. S., & Sapatnekar, S. (2007). Routing Congestion in VLSI Circuits: Estimation and Optimization (1st ed. 2007.). New York, NY: Springer US : Imprint: Springer.
Stile di citazione ChicagoSaxena, Prashant., Rupesh S. Shelar, and Sachin Sapatnekar. Routing Congestion in VLSI Circuits: Estimation and Optimization. 1st ed. 2007. New York, NY: Springer US : Imprint: Springer, 2007.
Citazione MLASaxena, Prashant., Rupesh S. Shelar, and Sachin Sapatnekar. Routing Congestion in VLSI Circuits: Estimation and Optimization. 1st ed. 2007. New York, NY: Springer US : Imprint: Springer, 2007.
Attenzione: Queste citazioni potrebbero non essere precise al 100%.