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New Algorithms, Architectures and Applications for Reconfigurable Computing

New Algorithms, Architectures and Applications for Reconfigurable Computing consists of a collection of contributions from the authors of some of the best papers from the Field Programmable Logic conference (FPL’03) and the Design and Test Europe conference (DATE’03). In all, seventy-nine authors, f...

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書目詳細資料
企業作者: SpringerLink (Online service)
其他作者: Lysaght, Patrick. (Editor, http://id.loc.gov/vocabulary/relators/edt), Rosenstiel, Wolfgang. (Editor, http://id.loc.gov/vocabulary/relators/edt)
格式: 電子 電子書
語言:English
出版: New York, NY : Springer US : Imprint: Springer, 2005.
版:1st ed. 2005.
主題:
Electrical engineering.
Software engineering.
Electronics.
Microelectronics.
Engineering design.
Logic design.
Computer-aided engineering.
Electrical Engineering.
Software Engineering/Programming and Operating Systems.
Electronics and Microelectronics, Instrumentation.
Engineering Design.
Logic Design.
Computer-Aided Engineering (CAD, CAE) and Design.
在線閱讀:https://doi.org/10.1007/1-4020-3128-9
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書本目錄:
  • Architectures
  • Extra-dimensional Island-Style FPGAs
  • A Tightly Coupled VLIW/Reconfigurable Matrix and its Modulo Scheduling Technique
  • Stream-based XPP Architectures in Adaptive System-on-Chip Integration
  • Core-Based Architecture for Data Transfer Control in SoC Design
  • Customizable and Reduced Hardware Motion Estimation Processors
  • Methodologies and Tools
  • Enabling Run-time Task Relocation on Reconfigurable Systems
  • A Unified Codesign Environment
  • Mapping Applications to a Coarse Grain Reconfigurable System
  • Compilation and Temporal Partitioning for a Coarse-grain Reconfigurable Architecture
  • Run-time Defragmentation for Dynamically Reconfigurable Hardware
  • Virtual Hardware Byte Code as a Design Platform for Reconfigurable Embedded Systems
  • A Low Energy Data Management for Multi-Context Reconfigurable Architectures
  • Dynamic and Partial Reconfiguration in FPGA SoCs: Requirements Tools and a Case Study
  • Applications
  • Design Flow for a Reconfigurable Processor
  • IPsec-Protected Transport of HDTV over IP
  • Fast, Large-scale String Match for a 10 Gbps FPGA-based NIDS
  • Architecture and FPGA Implementation of a Digit-serial RSA Processor
  • Division in GF(p) for Application in Elliptic Curve Cryptosystems on Field Programmable Logic
  • A New Arithmetic Unit in GF(2M) for Reconfigurable Hardware Implementation
  • Performance Analysis of SHACAL-1 Encryption Hardware Architectures
  • Security Aspects of FPGAs in Cryptographic Applications
  • Bioinspired Stimulus Encoder for Cortical Visual Neuroprostheses
  • A Smith-Waterman Systolic Cell
  • The Effects of Polynomial Degrees.

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