コメント: Multi-Net Optimization of VLSI Interconnect

Multi-Net Optimization of VLSI Interconnect

This book covers layout design and layout migration methodologies for optimizing multi-net wire structures in advanced VLSI interconnects. Scaling-dependent models for interconnect power, interconnect delay and crosstalk noise are covered in depth, and several design optimization problems are addres...

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書誌詳細
主要な著者:	Moiseev, Konstantin. (著者, http://id.loc.gov/vocabulary/relators/aut), Kolodny, Avinoam. (http://id.loc.gov/vocabulary/relators/aut), Wimer, Shmuel. (http://id.loc.gov/vocabulary/relators/aut)
団体著者:	SpringerLink (Online service)
フォーマット:	電子媒体 eBook
言語:	English
出版事項:	New York, NY : Springer New York : Imprint: Springer, 2015.
版:	1st ed. 2015.
主題:	Electronic circuits. Electronics. Microelectronics. Microprocessors. Circuits and Systems. Electronics and Microelectronics, Instrumentation. Processor Architectures.
オンライン･アクセス:	https://doi.org/10.1007/978-1-4614-0821-5
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Multi-Net Optimization of VLSI Interconnect

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