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Designing 2D and 3D Network-on-Chip Architectures

This book covers key concepts in the design of 2D and 3D Network-on-Chip interconnect.  It highlights design challenges and discusses fundamentals of NoC technology, including architectures, algorithms and tools.  Coverage focuses on topology exploration for both 2D and 3D NoCs, routing algorithms,...

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Détails bibliographiques
Auteurs principaux: Tatas, Konstantinos. (Auteur, http://id.loc.gov/vocabulary/relators/aut), Siozios, Kostas. (http://id.loc.gov/vocabulary/relators/aut), Soudris, Dimitrios. (http://id.loc.gov/vocabulary/relators/aut), Jantsch, Axel. (http://id.loc.gov/vocabulary/relators/aut)
Collectivité auteur: SpringerLink (Online service)
Format: Électronique eBook
Langue:English
Publié: New York, NY : Springer New York : Imprint: Springer, 2014.
Édition:1st ed. 2014.
Sujets:
Electronic circuits.
Electronics.
Microelectronics.
Microprocessors.
Circuits and Systems.
Electronics and Microelectronics, Instrumentation.
Processor Architectures.
Accès en ligne:https://doi.org/10.1007/978-1-4614-4274-5
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https://doi.org/10.1007/978-1-4614-4274-5

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