System-level Test and Validation of Hardware/Software Systems

New manufacturing technologies have made possible the integration of entire systems on a single chip. This new design paradigm, termed system-on-chip (SOC), together with its associated manufacturing problems, represents a real challenge for designers. As well as giving rise to new design practices,...

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Detalles Bibliográficos
Autor Corporativo: SpringerLink (Online service)
Otros Autores: Sonza Reorda, Matteo. (Editor , http://id.loc.gov/vocabulary/relators/edt), Peng, Zebo. (Editor , http://id.loc.gov/vocabulary/relators/edt), Violante, Massimo. (Editor , http://id.loc.gov/vocabulary/relators/edt)
Formato: Electrónico eBook
Lenguaje:English
Publicado: London : Springer London : Imprint: Springer, 2005.
Edición:1st ed. 2005.
Series:Springer Series in Advanced Microelectronics, 17
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Acceso en línea:https://doi.org/10.1007/1-84628-145-8
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Tabla de Contenidos:
  • Modeling Permanent Faults
  • Test Generation: A Symbolic Approach
  • Test Generation: A Heuristic Approach
  • Test Generation: A Hierarchical Approach
  • Test Program Generation from High-level Microprocessor Descriptions
  • Tackling Concurrency and Timing Problems
  • An Approach to System-level Design for Test
  • System-level Dependability Analysis.