TY  - GEN
TY  - GEN
T1  - High Performance Embedded Architectures and Compilers 5th International Conference, HiPEAC 2010, Pisa, Italy, January 25-27, 2010, Proceedings
T2  - Theoretical Computer Science and General Issues ;
A2  - Patt, Yale N.
A2  - Patt, Yale N.
A2  - Foglia, Pierfrancesco.
A2  - Foglia, Pierfrancesco.
A2  - Duesterwald, Evelyn.
A2  - Duesterwald, Evelyn.
A2  - Faraboschi, Paolo.
A2  - Faraboschi, Paolo.
A2  - Martorell, Xavier.
A2  - Martorell, Xavier.
LA  - English
PP  - Berlin, Heidelberg
PB  - Springer Berlin Heidelberg : Imprint: Springer
YR  - 2010
ED  - 1st ed. 2010.
UL  - http://discoverylib.upm.edu.my/discovery/Record/978-3-642-11515-8
AB  - This book constitutes the refereed proceedings of the 5th International Conference on High Performance Embedded Architectures and Compilers, HiPEAC 2010, held in Pisa, Italy, in January 2010. The 23 revised full papers presented together with the abstracts of 2 invited keynote addresses were carefully reviewed and selected from 94 submissions. The papers are organized in topical sections on architectural support for concurrency; compilation and runtime systems; reconfigurable and customized architectures; multicore efficiency, reliability, and power; memory organization and optimization; and programming and analysis of accelerators.
OP  - 370
CN  - QA76.6-76.66
SN  - 9783642115158
KW  - Computer programming.
KW  - Arithmetic and logic units, Computer.
KW  - Microprocessors.
KW  - Input-output equipment (Computers).
KW  - Logic design.
KW  - Computer communication systems.
KW  - Programming Techniques.
KW  - Arithmetic and Logic Structures.
KW  - Processor Architectures.
KW  - Input/Output and Data Communications.
KW  - Logic Design.
KW  - Computer Communication Networks.
ER  -