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VLSI-SoC: The Advanced Research for Systems on Chip 19th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2011, Hong Kong, China, October 3-5, 2011, Revised Selected Papers /

This book contains extended and revised versions of the best papers presented at the 19th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2011, held in Hong Kong, China, in October 2011. The 10 papers included in the book were carefully reviewed and selected from...

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Sonraí Bibleagrafaíochta
Údar Corparáideach: SpringerLink (Online service)
Údair Eile: Mir, Salvador. (Eagarthóir, http://id.loc.gov/vocabulary/relators/edt), Tsui, Chi-Ying. (Eagarthóir, http://id.loc.gov/vocabulary/relators/edt), Reis, Ricardo. (Eagarthóir, http://id.loc.gov/vocabulary/relators/edt), Choy, Oliver C.S. (Eagarthóir, http://id.loc.gov/vocabulary/relators/edt)
Formáid: Leictreonach ríomhLeabhar
Teanga:English
Foilsithe: Berlin, Heidelberg : Springer Berlin Heidelberg : Imprint: Springer, 2012.
Eagrán:1st ed. 2012.
Sraith:IFIP Advances in Information and Communication Technology, 379
Ábhair:
Computer hardware.
Architecture, Computer.
Special purpose computers.
Computer organization.
Computer software—Reusability.
Logic design.
Computer Hardware.
Computer System Implementation.
Special Purpose and Application-Based Systems.
Computer Systems Organization and Communication Networks.
Performance and Reliability.
Logic Design.
Rochtain Ar Líne:https://doi.org/10.1007/978-3-642-32770-4
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Clár Ábhair:
  • A Low Cost CMOS Polarimetric Ophthalmoscope Scheme for Cerebral Malaria Diagnostics
  • High Performance SoC Design Using Magnetic Logic and Memory
  • A Low-Power Ultra-Fast Capacitor-Less LDO with Advanced Dynamic Push-Pull Techniques
  • Improvements to Satisfiability-Based Boolean Function Bi-Decomposition
  • Multiplierless Design of Linear DSP Transform
  • Self-dependent Equivalent Circuit Modeling of Electrostatic Comb Transducers for Integrated MEMS
  • On the Functional Test of Branch Prediction Units Based on the Branch History Table Architecture
  • Efficient Multi-rate Hybrid Continuous-Time/Discrete-Time Cascade
  • 2-2 Sigma-Delta Modulators for Wideband Telecom
  • A 100dB SFDR 0.5V pk-pk Band-Pass DAC Implemented on a Low Voltage CMOS Process
  • Analysis and Design Strategy of On-Chip Charge Pumps for Micro-power Energy Harvesting Applications.

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