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Real time plate recognition for motorcycle using field programmable gate array

The aim of this project is to develop motorcycle plate image detection and recognition framework for traffic offender using Field Programmable Gate Array (FPGA). The proposed system has processing time of 33.3 milliseconds in various critical conditions, such as daylight, rainy daylight and night...

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Dades bibliogràfiques
Autor principal:	Mat Nong, Mohd Ali
Format:	Thesis
Idioma:	English
Publicat:	2019
Matèries:	Gate array circuits Programmable array logic
Accés en línia:	http://psasir.upm.edu.my/id/eprint/99237/1/ITMA%202020%2013%20IR.pdf
Etiquetes:	Afegir etiqueta Sense etiquetes, Sigues el primer a etiquetar aquest registre!

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