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Real time plate recognition for motorcycle using field programmable gate array

The aim of this project is to develop motorcycle plate image detection and recognition framework for traffic offender using Field Programmable Gate Array (FPGA). The proposed system has processing time of 33.3 milliseconds in various critical conditions, such as daylight, rainy daylight and night...

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書誌詳細
第一著者:	Mat Nong, Mohd Ali
フォーマット:	学位論文
言語:	English
出版事項:	2019
主題:	Gate array circuits Programmable array logic
オンライン･アクセス:	http://psasir.upm.edu.my/id/eprint/99237/1/ITMA%202020%2013%20IR.pdf
タグ:	タグ追加タグなし, このレコードへの初めてのタグを付けませんか!

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