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Real time plate recognition for motorcycle using field programmable gate array

The aim of this project is to develop motorcycle plate image detection and recognition framework for traffic offender using Field Programmable Gate Array (FPGA). The proposed system has processing time of 33.3 milliseconds in various critical conditions, such as daylight, rainy daylight and night...

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Bibliografske podrobnosti
Glavni avtor:	Mat Nong, Mohd Ali
Format:	Thesis
Jezik:	English
Izdano:	2019
Teme:	Gate array circuits Programmable array logic
Online dostop:	http://psasir.upm.edu.my/id/eprint/99237/1/ITMA%202020%2013%20IR.pdf
Oznake:	Označite Brez oznak, prvi označite!

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