Search Results - parallel block processor functionality function https

1

Network and Parallel Computing IFIP International Conference, NPC 2010, Zhengzhou, China, September 13-15, 2010, Proceedings /

Published 2010

Table of Contents: “...-Performance of Multi-core Processors -- Internet-Based Virtual Computing Environment -- Session 1...”
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2

Parallel Computing Technologies 9th International Conference, PaCT 2007, Pereslavl-Zalessky, Russia, September 3-7, 2007, Proceedings /

Published 2007

Table of Contents: “... of Optimal Matrix Partitioning for Parallel Dense Factorization on Heterogeneous Processors -- Parallel...”
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3

Algorithms and Architectures for Parallel Processing 10th International Conference, ICA3PP 2010, Busan, Korea, May 21-23, 2010. Proceedings, Part I /

Published 2010

Table of Contents: “... in Distributed Environments by Simultaneous Fragmentation and Allocation -- Parallel Architectures -- Function...”
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4

Algorithms and Architectures for Parallel Processing 10th International Conference, ICA3PP 2010, Busan, Korea, May 21-23, 2010. Workshops, Part II /

Published 2010

Table of Contents: “... Smoothing to Inverse Halftoning Based on the MTF Function of Human Eyes -- Power Improvement Using Block...”
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5

Euro-Par 2009, Parallel Processing - Workshops HPPC, HeteroPar, PROPER, ROIA, UNICORE, VHPC, Delft, The Netherlands, August 25-28, 2009, Workshops /

Published 2010

Table of Contents: “... on Heterogeneous Processors Based on Their Functional Performance Models -- Accelerating S3D: A GPGPU Case Study...”
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6

Multicore Systems On-Chip: Practical Software/Hardware Design

by Ben Abdallah, Abderazek., Ben Abdallah, Abderazek.
Published 2013

Table of Contents: “... NoCs -- Parallelizing Compiler for Single and Multicore Computing -- Power Optimization Techniques...”
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7

Turbo Decoder Architecture for Beyond-4G Applications

by Wong, Cheng-Chi., Wong, Cheng-Chi., Chang, Hsie-Chia.
Published 2014

Table of Contents: “...Introduction -- Conventional Architecture of Turbo Decoder -- Turbo Decoder with Parallel...”
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8

Design of Embedded Control Systems

Published 2005

Table of Contents: “... Prediction for Embedded Processors Using an ADL -- Verification of Control Paths Using Petri Nets -- Memory...”
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9

High-Performance Computing 6th International Symposium, ISHPC 2005, Nara, Japan, September 7-9, 2005, First International Workshop on Advance Low Power Systems, ALPS 2006, Revised...

Published 2008

Table of Contents: “... -- Exploiting Execution Locality with a Decoupled Kilo-Instruction Processor -- Decoupled State-Execute...”
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10

High Performance Embedded Architectures and Compilers Third International Conference, HiPEAC 2008, Göteborg, Sweden, January 27-29, 2008, Proceedings /

Published 2008

Table of Contents: “... Parallelism on Heterogeneous Multi-core Processors: A Case Study of the Cell BE -- IIa Reconfigurable - ASIP...”
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11

Advances in Computer Systems Architecture 11th Asia-Pacific Conference, ACSAC 2006, Shanghai, China, September 6-8, 2006, Proceedings /

Published 2006

Table of Contents: “... Processors Through Static Scheduling, Profiling and SuperBlock Formation -- Fault-Free Pairwise Independent...”
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12

Embedded Computer Systems: Architectures, Modeling, and Simulation 7th International Workshop, SAMOS 2007, Samos, Greece, July 16-19, 2007, Proceedings /

Published 2007

Table of Contents: “... on a Massively Parallel Embedded Processor -- Stream Image Processing on a Dual-Core Embedded System...”
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13

Reconfigurable Computing: Architectures, Tools and Applications 6th International Symposium, ARC 2010, Bangkok, Thailand, March 17-19, 2010, Proceedings /

Published 2010

Table of Contents: “...Keynotes (Abstracts) -- High-Performance Energy-Efficient Reconfigurable Accelerators/Co-processors...”
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14

High Performance Computing for Computational Science - VECPAR 2008 8th International Conference, Toulouse, France, June 24-27, 2008. Revised Selected Papers /

Published 2008

Table of Contents: “... in General-Purpose Computations on Current Graphics Processors -- Optimised Computational Functional Imaging...”
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15

Metric Driven Design Verification An Engineer's and Executive's Guide to First Pass Success /

by Carter, Hamilton B., Carter, Hamilton B., Hemmady, Shankar G.
Published 2007

Table of Contents: “... Complex Network Processor -- Developing a Coverage-Driven SoC Methodology -- From Panic-Driven to Plan...”
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16

High Performance Computing in Science and Engineering, Garching/Munich 2009 Transactions of the Fourth Joint HLRB and KONWIHR Review and Results Workshop, Dec. 8-9, 2009, Leibniz S...

Published 2010

Table of Contents: “... Multi-Core Environments -- waLBerla: Optimization for Itanium-based Systems with Thousands of Processors...”
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17

Large-Scale Scientific Computing 8th International Conference, LSSC 2011, Sozopol, Bulgaria, June 6-10th, 2011. Revised Selected Papers /

Published 2012

Table of Contents: “... and Applications to Aerodynamics .-Processor Array Design with the Use of Genetic Algorithm.-A Hybrid Genetic...”
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18

Computational Science - ICCS 2007 7th International Conference, Beijing China, May 27-30, 2007, Proceedings, Part I /

Published 2007

Table of Contents: “... Applications on the Stream Processor -- A Scalable Parallel Software Volume Rendering Algorithm for Large-Scale...”
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19

Advances in Information Processing and Protection

Published 2007

Table of Contents: “... -- Multiple Error Detection in Substitution Blocks for Block Ciphers -- Parallelization Method of Encryption...”
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20

Applied Reconfigurable Computing 11th International Symposium, ARC 2015, Bochum, Germany, April 13-17, 2015, Proceedings /

Published 2015

Table of Contents: “... Instruction Memory Cache Blocks -- A Vector Caching Scheme for Streaming FPGA SpMV Accelerators...”
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