1
Published 2015
Table of Contents: ... Ordered Restarting Automata -- Reversible Languages -- Garbage Collection for Reversible Functional...
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2
Table of Contents: ...? Inside the FPGA. Mapping Algorithms to Hardware. RC Applications. Example: Dot Product. Further Reading...
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3
Published 2008
Table of Contents: ... Alias to Detect Null Pointer Dereference -- A Partial Order Reduction Technique for Parallel Timed...
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4
Published 2010
Table of Contents: ... of Reconfigurable Hardware for Accelerated Parallel Processing -- Routing-Aware Application Mapping Considering...
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5
Published 2006
Table of Contents: ... for Coordinating Data-Parallel Programs (Position Statement) -- Implementations of Square-Root and Exponential...
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6
Published 2007
Table of Contents: ... Synchronization Framework -- A Model-Driven Automatically-Retargetable Debug Tool for Embedded Systems...
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7
Published 2005
Table of Contents: ... Logic to Logic Programs -- Preference Revision Via Declarative Debugging -- Revised Stable Models – A...
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8
Published 2012
Table of Contents: ... Bug Reproducing Method for the Debugging of Component-Based Parallel Discrete Event Simulation...
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9
Table of Contents: ... -- Operators, Expressions, and Program Flow -- Defining Functions and Using Built-ins -- Input and Output...
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