Rezultaty - parallel generation processor function function https

Inne możliwości wyszukiwania:
generation processor » generation process , generation processes , regeneration processes
parallel generation » parallel enumeration , parallel operation , parallel acceleration
processor function » processes function , processes functions , process functions
function function » function functional , functions functional , function dysfunction
function https » functions https , fiction https

New Horizons of Parallel and Distributed Computing

Wydane 2005

Spis treści: “... without Trusted Parties -- Scheduling Parallel Tasks onto Numa Multiprocessors with Inter-Processor...”
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Parallel Computing Technologies 9th International Conference, PaCT 2007, Pereslavl-Zalessky, Russia, September 3-7, 2007, Proceedings /

Wydane 2007

Spis treści: “... of Optimal Matrix Partitioning for Parallel Dense Factorization on Heterogeneous Processors -- Parallel...”
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Languages and Compilers for Parallel Computing 22nd International Workshop, LCPC 2009, Newark, DE, USA, October 8-10, 2009, Revised Selected Papers /

Wydane 2010

Spis treści: “...A Communication Framework for Fault-Tolerant Parallel Execution -- The STAPL pList -- Hardware...”
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Languages and Compilers for Parallel Computing 18th International Workshop, LCPC 2005, Hawthorne, NY, USA, October 20-22, 2005, Revised Selected Papers /

Wydane 2006

Spis treści: “... Domain Specific Language on Network Processors -- Array Replication to Increase Parallelism...”
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Parallel Processing and Applied Mathematics, Part II 8th International Conference, PPAM 2009, Wroclaw, Poland, September 13-16, 2009, Proceedings /

Wydane 2010

Spis treści: “... for Multiscale Flows – Towards the Petascale Generation of Mesoscale Numerical Weather Prediction -- Parallel...”
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Modern Compiler Design

od Grune, Dick., Grune, Dick., van Reeuwijk, Kees., Bal, Henri E., Jacobs, Ceriel J.H., Langendoen, Koen.
Wydane 2012

Spis treści: “... Management -- Imperative and Object-Oriented Programs -- Functional Programs -- Logic Programs -- Parallel...”
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Reconfigurable Computing: Architectures, Tools, and Applications 4th International Workshop, ARC 2008, London, UK, March 26-28, 2008, Proceedings /

Wydane 2008

Spis treści: “... Structure of 64-Bit Exponential Function Implemented in FPGAs -- A Framework for the Automatic Generation...”
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High Performance Embedded Architectures and Compilers Third International Conference, HiPEAC 2008, Göteborg, Sweden, January 27-29, 2008, Proceedings /

Wydane 2008

Spis treści: “... Parallelism on Heterogeneous Multi-core Processors: A Case Study of the Cell BE -- IIa Reconfigurable - ASIP...”
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Embedded Computer Systems: Architectures, Modeling, and Simulation 7th International Workshop, SAMOS 2007, Samos, Greece, July 16-19, 2007, Proceedings /

Wydane 2007

Spis treści: “... on a Massively Parallel Embedded Processor -- Stream Image Processing on a Dual-Core Embedded System...”
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Advances in Computer Systems Architecture 11th Asia-Pacific Conference, ACSAC 2006, Shanghai, China, September 6-8, 2006, Proceedings /

Wydane 2006

Spis treści: “... for Coordinating Data-Parallel Programs (Position Statement) -- Implementations of Square-Root and Exponential...”
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Computer Aided Systems Theory – EUROCAST 2005 10th International Conference on Computer Aided Systems Theory, Las Palmas de Gran Canaria, Spain, February 7-11, 2005, Revised Select...

Wydane 2005

Spis treści: “... Information -- Intelligent Information Systems -- On Recursive Functions and Well–Founded Relations...”
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Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation 17th International Workshop, PATMOS 2007, Gothenburg, Sweden, September 3-5, 2007, Proc...

Wydane 2007

Spis treści: “... on the TTA -- Asynchronous Functional Coupling for Low Power Sensor Network Processors -- A Heuristic...”
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Transactions on High-Performance Embedded Architectures and Compilers IV

Wydane 2011

Spis treści: “... Transactional Memory -- A Parallelizing Compiler Cooperative Heterogeneous Multicore Processor Architecture -- A...”
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Reconfigurable Computing: Architectures, Tools and Applications 6th International Symposium, ARC 2010, Bangkok, Thailand, March 17-19, 2010, Proceedings /

Wydane 2010

Spis treści: “... -- Architecture-Aware Custom Instruction Generation for Reconfigurable Processors -- Cost and Performance...”
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Automatic SIMD Vectorization of SSA-based Control Flow Graphs

od Karrenberg, Ralf., Karrenberg, Ralf.
Wydane 2015

Hasła przedmiotowe: “...Programming Languages, Compilers, Interpreters. https://scigraph.springernature.com/ontologies...”
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Evolvable Systems: From Biology to Hardware 7th International Conference, ICES 2007, Wuhan, China, September 21-23, 2007, Proceedings /

Wydane 2007

Spis treści: “... Design -- Walsh Function Systems: The Bisectional Evolutional Generation Pattern -- Extrinsic Evolvable...”
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Correct Hardware Design and Verification Methods 13th IFIP WG 10.5Advanced Research, Working Conference, CHARME 2005, Saarbrücken, Germany, October 3-6, 2005, Proceedings /

Wydane 2005

Spis treści: “... for Pipelined Processors with Multicycle Functional Units -- Algorithms and Techniques for Speeding (DD-Based...”
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Artificial Intelligence and Knowledge Engineering Applications: A Bioinspired Approach First International Work-Conference on the Interplay Between Natural and Artificial Computati...

Wydane 2005

Spis treści: “... Rule-Table for Function Approximation by Use of Symbolic Regression in 1D and 2D Cases -- Parallel...”
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Artificial Evolution 9th International Conference, Evolution Artificielle, EA 2009, Strasbourg, France, October 26-28, 2009. Revised Selected Papers /

Wydane 2010

Spis treści: “... -- Parallelization of an Evolutionary Algorithm on a Platform with Multi-core Processors -- On the Difficulty...”
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Metric Driven Design Verification An Engineer's and Executive's Guide to First Pass Success /

od Carter, Hamilton B., Carter, Hamilton B., Hemmady, Shankar G.
Wydane 2007

Spis treści: “... Complex Network Processor -- Developing a Coverage-Driven SoC Methodology -- From Panic-Driven to Plan...”
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