1
Published 2006
Table of Contents: ... Spaces with Massively Parallel Embedded Processors -- Efficient Automated Clock Gating Using CoDeL...
View full text
Electronic eBook
2
Published 2008
Table of Contents: ... Parallelism on Heterogeneous Multi-core Processors: A Case Study of the Cell BE -- IIa Reconfigurable - ASIP...
View full text
Electronic eBook
3
Published 2008
Table of Contents: ... Systems -- Streaming Systems in FPGAs -- Heterogeneous Design in Functional DIF -- Tool Integration...
View full text
Electronic eBook
4
Published 2005
Table of Contents: ... Through Span Composition -- Degenerate Arrays: A Framework for Uncertain Data Tables -- Neural Network...
View full text
Electronic eBook
5
Published 2007
Table of Contents: ...Keynotes -- Software Is the Answer But What Is the Question? -- Integrating VLIW Processors with a...
View full text
Electronic eBook
6
Published 2010
Table of Contents: ... -- Generic Systolic Array for Run-Time Scalable Cores -- Virtualization within a Parallel Array...
View full text
Electronic eBook
7
Published 2013
Table of Contents: ... urban space: A case study of cozy space design pattern -- Quantum-Membership-Function-Based Adaptive...
View full text
Electronic eBook
8
Published 2007
Table of Contents: ...-aware Pipeline Synthesis for Array based Reconfigurable Architectures -- An Interactive Design...
View full text
Electronic eBook