1
Table of Contents: ...Introduction -- Conventional Architecture of Turbo Decoder -- Turbo Decoder with Parallel...
View full text
Electronic eBook
2
Published 2008
Table of Contents: ... Parallelism on Heterogeneous Multi-core Processors: A Case Study of the Cell BE -- IIa Reconfigurable - ASIP...
View full text
Electronic eBook
3
Published 2006
Table of Contents: ... for Programming Chip Multiprocessors -- Functional Unit Chaining: A Runtime Adaptive Architecture for Reducing...
View full text
Electronic eBook
4
Published 2007
Table of Contents: ... Processor Architecture Using Asynchronous Function Units -- A Bypass Mechanism to Enhance Branch Predictor...
View full text
Electronic eBook
5
Published 2007
Table of Contents: ... Measurements -- A Flexible General-Purpose Parallelizing Architecture for Nested Loops in Reconfigurable...
View full text
Electronic eBook
6
Published 2011
Table of Contents: ... Highly Scalable Parallel Implementation of H.264 -- Communication Based Proactive Link Power Management...
View full text
Electronic eBook
7
Published 2006
Table of Contents: ... Spaces with Massively Parallel Embedded Processors -- Efficient Automated Clock Gating Using CoDeL...
View full text
Electronic eBook
8
Published 2007
Table of Contents: ... Factor Unit for FFT Computation -- Trade-Offs Between Voltage Scaling and Processor Shutdown for Low...
View full text
Electronic eBook
9
Published 2010
Table of Contents: ... for Tera-Scale Multi-core Microprocessors -- Process Variability and Degradation: New Frontier...
View full text
Electronic eBook
10
Published 2010
Table of Contents: ... (OWAMP) -- QoS Predictability of Internet Services -- Instruction Prediction in Microprocessor Unit Based...
View full text
Electronic eBook
11
Published 2013
Table of Contents: ... the Sorted-Set Intersection Problem onto a Graphics Processing Unit -- A Novel Double Dynamic Stress...
View full text
Electronic eBook