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Multicore Systems On-Chip: Practical Software/Hardware Design

by Ben Abdallah, Abderazek., Ben Abdallah, Abderazek.
Published 2013

Table of Contents: “... NoCs -- Parallelizing Compiler for Single and Multicore Computing -- Power Optimization Techniques...”
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Turbo Decoder Architecture for Beyond-4G Applications

by Wong, Cheng-Chi., Wong, Cheng-Chi., Chang, Hsie-Chia.
Published 2014

Table of Contents: “... Processing -- Low-Complexity Solution for Highly Parallel Architecture -- High Efficiency Solution for Highly...”
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Intelligent Technologies and Engineering Systems

Published 2013

Table of Contents: “... the Sorted-Set Intersection Problem onto a Graphics Processing Unit -- A Novel Double Dynamic Stress...”
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Embedded Computer Systems: Architectures, Modeling, and Simulation 6th International Workshop, SAMOS 2006, Samos, Greece, July 17-20, 2006, Proceedings /

Published 2006

Table of Contents: “... Spaces with Massively Parallel Embedded Processors -- Efficient Automated Clock Gating Using CoDeL...”
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Design of Embedded Control Systems

Published 2005

Table of Contents: “... -- The Influence of Functional Decomposition on Modern Digital Design Process -- System Engineering for Embedded...”
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High Performance Computational Science and Engineering IFIP TC5 Workshop on High Performance Computational Science and Engineering (HPCSE), World Computer Congress, August 22-27, 2...

Published 2005

Table of Contents: “...Keynote Talk -- Exploiting Multiple Levels of Parallelism in Scientific Computing -- Distributed...”
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High Performance Embedded Architectures and Compilers Third International Conference, HiPEAC 2008, Göteborg, Sweden, January 27-29, 2008, Proceedings /

Published 2008

Table of Contents: “... Processing -- rMPI: Message Passing on Multicore Processors with On-Chip Interconnect -- Modeling Multigrain...”
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Reconfigurable Computing: Architectures, Tools, and Applications 4th International Workshop, ARC 2008, London, UK, March 26-28, 2008, Proceedings /

Published 2008

Table of Contents: “...Keynotes -- Synthesizing FPGA Circuits from Parallel Programs -- From Silicon to Science: The Long...”
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Advances in Computer Systems Architecture 11th Asia-Pacific Conference, ACSAC 2006, Shanghai, China, September 6-8, 2006, Proceedings /

Published 2006

Table of Contents: “... for Coordinating Data-Parallel Programs (Position Statement) -- Implementations of Square-Root and Exponential...”
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Computer Aided Systems Theory – EUROCAST 2005 10th International Conference on Computer Aided Systems Theory, Las Palmas de Gran Canaria, Spain, February 7-11, 2005, Revised Select...

Published 2005

Table of Contents: “... Information -- Intelligent Information Systems -- On Recursive Functions and Well–Founded Relations...”
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Embedded Computer Systems: Architectures, Modeling, and Simulation 7th International Workshop, SAMOS 2007, Samos, Greece, July 16-19, 2007, Proceedings /

Published 2007

Table of Contents: “... on a Massively Parallel Embedded Processor -- Stream Image Processing on a Dual-Core Embedded System...”
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Embedded Computer Systems: Architectures, Modeling, and Simulation 8th International Workshop, SAMOS 2008, Samos, Greece, July 21-24, 2008, Proceedings /

Published 2008

Table of Contents: “... Level Parallelism and Register File Traffic -- Scalable Architecture for Prefix Preserving Anonymization...”
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Advances in Computer Systems Architecture 12th Asia-Pacific Conference, ACSAC 2007, Seoul, Korea, August 23-25, 2007, Proceedings /

Published 2007

Table of Contents: “... Approach for Speculative Parallel Threading -- Entropy-Based Profile Characterization and Classification...”
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Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation 17th International Workshop, PATMOS 2007, Gothenburg, Sweden, September 3-5, 2007, Proc...

Published 2007

Table of Contents: “... Measurements -- A Flexible General-Purpose Parallelizing Architecture for Nested Loops in Reconfigurable...”
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Applications of Evolutionary Computing Evoworkshops: EvoBIO, EvoCOMNET, EvoHot, EvoIASP, EvoMUSART, and EvoSTOC /

Published 2005

Table of Contents: “... -- Automatic Completion and Refinement of Verification Sets for Microprocessor Cores -- A Genetic Algorithm...”
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Reconfigurable Computing: Architectures, Tools and Applications 6th International Symposium, ARC 2010, Bangkok, Thailand, March 17-19, 2010, Proceedings /

Published 2010

Table of Contents: “... for Tera-Scale Multi-core Microprocessors -- Process Variability and Degradation: New Frontier...”
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Interactive Theorem Proving 5th International Conference, ITP 2014, Held as Part of the Vienna Summer of Logic, VSL 2014, Vienna, Austria, July 14-17, 2014, Proceedings /

Published 2014

Table of Contents: “...Microcode Verification – Another Piece of the Microprocessor Verification Puzzle -- Are We...”
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Computer Networks 17th Conference, CN 2010, Ustron, Poland, June 15-19, 2010. Proceedings /

Published 2010

Table of Contents: “... Multipartite Quantum Systems and Its Role in Quantum Information Processing Tasks -- GPGPU Based Simulations...”
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Embedded System Design: Topics, Techniques and Trends IFIP TC10 Working Conference: International Embedded Systems Symposium (IESS), May 30 - June 1, 2007, Irvine (CA), USA /

Published 2007

Table of Contents: “... and Partitioning -- A Hybrid Approach for System-Level Design Evaluation -- Automatic Parallelization of Sequential...”
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