Search Results - parallel processor 5 functionality function https

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Automatic SIMD Vectorization of SSA-based Control Flow Graphs

by Karrenberg, Ralf., Karrenberg, Ralf.
Published 2015

Subjects: “...Programming Languages, Compilers, Interpreters. https://scigraph.springernature.com/ontologies...”
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High Performance Embedded Architectures and Compilers Third International Conference, HiPEAC 2008, Göteborg, Sweden, January 27-29, 2008, Proceedings /

Published 2008

Table of Contents: “... Parallelism on Heterogeneous Multi-core Processors: A Case Study of the Cell BE -- IIa Reconfigurable - ASIP...”
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Languages and Compilers for Parallel Computing 22nd International Workshop, LCPC 2009, Newark, DE, USA, October 8-10, 2009, Revised Selected Papers /

Published 2010

Table of Contents: “...A Communication Framework for Fault-Tolerant Parallel Execution -- The STAPL pList -- Hardware...”
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Euro-Par 2009, Parallel Processing - Workshops HPPC, HeteroPar, PROPER, ROIA, UNICORE, VHPC, Delft, The Netherlands, August 25-28, 2009, Workshops /

Published 2010

Table of Contents: “... on Heterogeneous Processors Based on Their Functional Performance Models -- Accelerating S3D: A GPGPU Case Study...”
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Correct Hardware Design and Verification Methods 13th IFIP WG 10.5Advanced Research, Working...

Published 2005

Table of Contents: “... for Pipelined Processors with Multicycle Functional Units -- Algorithms and Techniques for Speeding (DD-Based...”
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Transactions on High-Performance Embedded Architectures and Compilers IV

Published 2011

Table of Contents: “... Transactional Memory -- A Parallelizing Compiler Cooperative Heterogeneous Multicore Processor Architecture -- A...”
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Embedded Computer Systems: Architectures, Modeling, and Simulation 7th International Workshop, SAMOS 2007, Samos, Greece, July 16-19, 2007, Proceedings /

Published 2007

Table of Contents: “... on a Massively Parallel Embedded Processor -- Stream Image Processing on a Dual-Core Embedded System...”
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VLSI-SoC: From Algorithms to Circuits and System-on-Chip Design 20th IFIP WG 10.5/IEEE...

Published 2013

Table of Contents: “... Programs for Functional Test and Diagnosis of VLIW Processors -- SEU-Aware Low-Power Memories Using a...”
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Parallel Processing and Applied Mathematics, Part II 8th International Conference, PPAM 2009, Wroclaw, Poland, September 13-16, 2009, Proceedings /

Published 2010

Table of Contents: “...Workshop on Scheduling for Parallel Computing (SPC 2009) -- Fully Polynomial Time Approximation...”
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Computer Science -- Theory and Applications First International Symposium on Computer Science in Russia, CSR 2006, St. Petersburg, Russia, June 8-12, 2006, Proceedings /

Published 2006

Table of Contents: “... of Asynchronous Automata -- Conjugacy and Equivalence of Weighted Automata and Functional Transducers...”
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High Performance Computing - HiPC 2008 15th International Conference, Bangalore, India, December 17-20, 2008, Proceedings /

Published 2008

Table of Contents: “... Media -- The Excitement in Parallel Computing -- Session I: Performance Optimization -- Improving...”
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Advances in Computer Systems Architecture 12th Asia-Pacific Conference, ACSAC 2007, Seoul, Korea, August 23-25, 2007, Proceedings /

Published 2007

Table of Contents: “... Processor Architecture Using Asynchronous Function Units -- A Bypass Mechanism to Enhance Branch Predictor...”
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High Performance Computational Science and Engineering IFIP TC5 Workshop on High Performance...

Published 2005

Table of Contents: “...Keynote Talk -- Exploiting Multiple Levels of Parallelism in Scientific Computing -- Distributed...”
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Advances in Information Processing and Protection

Published 2007

Table of Contents: “... -- Visualization of Five Erosion Risk Classes using Kernel Discriminants -- Computer Security and Safety...”
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Network and Parallel Computing IFIP International Conference, NPC 2010, Zhengzhou, China, September 13-15, 2010, Proceedings /

Published 2010

Table of Contents: “... Parallel Methods for Image Compositing in Sort-Last Rendering -- Session 5: GPU and Multicore -- memCUDA...”
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Transactions on Computational Science XVII

Published 2013

Table of Contents: “... Industrial Robots -- A Combined Position Evaluation Function in Chinese Chess Computer Game -- Modeling...”
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Architecture of Computing Systems -- ARCS 2013 26th International Conference, Prague, Czech Republic, February 19-22, 2013 Proceedings /

Published 2013

Table of Contents: “...: The Programming Model for Future Many-Core Processors -- A Highly Dependable Self-adaptive Mixed-Signal Multi-core...”
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Embedded Computer Systems: Architectures, Modeling, and Simulation 8th International Workshop, SAMOS 2008, Samos, Greece, July 21-24, 2008, Proceedings /

Published 2008

Table of Contents: “... Different Cache Levels in a Soft Real-Time SMT Processor -- Impact of Software Bypassing on Instruction...”
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Reconfigurable Computing: Architectures, Tools and Applications 6th International Symposium, ARC 2010, Bangkok, Thailand, March 17-19, 2010, Proceedings /

Published 2010

Table of Contents: “...Keynotes (Abstracts) -- High-Performance Energy-Efficient Reconfigurable Accelerators/Co-processors...”
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High-Performance Computing 6th International Symposium, ISHPC 2005, Nara, Japan, September 7-9, 2005, First International Workshop on Advance Low Power Systems, ALPS 2006, Revised...

Published 2008

Table of Contents: “... -- Exploiting Execution Locality with a Decoupled Kilo-Instruction Processor -- Decoupled State-Execute...”
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