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Network and Parallel Computing IFIP International Conference, NPC 2005, Beijing, China, November 30 - December 3, 2005, Proceedings /

Published 2005

Table of Contents: “... Optical Networks -- A Parallel O(n27n/8) Time-Memory-Processor Tradeoff for Knapsack-Like Problems...”
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Parallel Computing Technologies 9th International Conference, PaCT 2007, Pereslavl-Zalessky, Russia, September 3-7, 2007, Proceedings /

Published 2007

Table of Contents: “... of Optimal Matrix Partitioning for Parallel Dense Factorization on Heterogeneous Processors -- Parallel...”
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Algorithms and Architectures for Parallel Processing 10th International Conference, ICA3PP 2010, Busan, Korea, May 21-23, 2010. Proceedings, Part I /

Published 2010

Table of Contents: “... in Distributed Environments by Simultaneous Fragmentation and Allocation -- Parallel Architectures -- Function...”
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Advances in Computer Systems Architecture 11th Asia-Pacific Conference, ACSAC 2006, Shanghai, China, September 6-8, 2006, Proceedings /

Published 2006

Table of Contents: “... for Coordinating Data-Parallel Programs (Position Statement) -- Implementations of Square-Root and Exponential...”
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Advances in Computer Systems Architecture 12th Asia-Pacific Conference, ACSAC 2007, Seoul, Korea, August 23-25, 2007, Proceedings /

Published 2007

Table of Contents: “... Processor Architecture Using Asynchronous Function Units -- A Bypass Mechanism to Enhance Branch Predictor...”
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Advances in Information Processing and Protection

Published 2007

Table of Contents: “... -- Multiple Error Detection in Substitution Blocks for Block Ciphers -- Parallelization Method of Encryption...”
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Advanced Techniques in Computing Sciences and Software Engineering

Published 2010

Table of Contents: “...Bridging Calculus and Statistics: Null - Hypotheses Underlain by Functional Equations...”
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High-Performance Computing 6th International Symposium, ISHPC 2005, Nara, Japan, September 7-9, 2005, First International Workshop on Advance Low Power Systems, ALPS 2006, Revised Selected Papers /

Published 2008

Table of Contents: “... -- Exploiting Execution Locality with a Decoupled Kilo-Instruction Processor -- Decoupled State-Execute...”
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Turbo Decoder Architecture for Beyond-4G Applications

by Wong, Cheng-Chi., Wong, Cheng-Chi., Chang, Hsie-Chia.
Published 2014

Table of Contents: “...Introduction -- Conventional Architecture of Turbo Decoder -- Turbo Decoder with Parallel...”
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From Model-Driven Design to Resource Management for Distributed Embedded Systems IFIP TC 10 Working Conference on Distributed and Parallel Embedded Systems (DIPES 2006) October 11-13, 2006, Braga, Portugal /

Published 2006

Table of Contents: “... Nodes -- Transient Processor/Bus Fault Tolerance for Embedded Systems -- Distributed Timed Multitasking...”
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Correct Hardware Design and Verification Methods 13th IFIP WG 10.5Advanced Research, Working...

Published 2005

Table of Contents: “... for Pipelined Processors with Multicycle Functional Units -- Algorithms and Techniques for Speeding (DD-Based...”
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High Performance Computational Science and Engineering IFIP TC5 Workshop on High Performance Computational Science and Engineering (HPCSE), World Computer Congress, August 22-27, 2...

Published 2005

Table of Contents: “...Keynote Talk -- Exploiting Multiple Levels of Parallelism in Scientific Computing -- Distributed...”
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Embedded Computer Systems: Architectures, Modeling, and Simulation 6th International Workshop, SAMOS 2006, Samos, Greece, July 17-20, 2006, Proceedings /

Published 2006

Table of Contents: “... Spaces with Massively Parallel Embedded Processors -- Efficient Automated Clock Gating Using CoDeL...”
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Computer Aided Systems Theory – EUROCAST 2005 10th International Conference on Computer Aided Systems Theory, Las Palmas de Gran Canaria, Spain, February 7-11, 2005, Revised Select...

Published 2005

Table of Contents: “... Information -- Intelligent Information Systems -- On Recursive Functions and Well–Founded Relations...”
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Embedded Computer Systems: Architectures, Modeling, and Simulation 7th International Workshop, SAMOS 2007, Samos, Greece, July 16-19, 2007, Proceedings /

Published 2007

Table of Contents: “... on a Massively Parallel Embedded Processor -- Stream Image Processing on a Dual-Core Embedded System...”
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Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation 17th International Workshop, PATMOS 2007, Gothenburg, Sweden, September 3-5, 2007, Proc...

Published 2007

Table of Contents: “... on the TTA -- Asynchronous Functional Coupling for Low Power Sensor Network Processors -- A Heuristic...”
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Transactions on High-Performance Embedded Architectures and Compilers IV

Published 2011

Table of Contents: “... Transactional Memory -- A Parallelizing Compiler Cooperative Heterogeneous Multicore Processor Architecture -- A...”
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Progress in Systems Engineering Proceedings of the Twenty-Third International Conference on Systems Engineering /

Published 2015

Table of Contents: “... in Parallel Architectures and Multi- core Processors, For Performance Improvement -- Aligning Systems...”
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VLSI-SoC: From Algorithms to Circuits and System-on-Chip Design 20th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2012, Santa Cruz, CA, USA,...

Published 2013

Table of Contents: “... Programs for Functional Test and Diagnosis of VLIW Processors -- SEU-Aware Low-Power Memories Using a...”
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Artificial Intelligence and Evolutionary Algorithms in Engineering Systems Proceedings of ICAEES 2014, Volume 2 /

Published 2015

Table of Contents: “... of Spoofed IP Packets -- 11. A Queueing Model for E-Learning System -- 12. Development of Common Parallel...”
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