Risultati della ricerca - parallel processor array function ((functional https) OR (function https))

1

Network and Parallel Computing IFIP International Conference, NPC 2005, Beijing, China, November 30 - December 3, 2005, Proceedings /

Pubblicazione 2005

Sommario: “... Optical Networks -- A Parallel O(n27n/8) Time-Memory-Processor Tradeoff for Knapsack-Like Problems...”
Testo

Elettronico eBook

2

Parallel Computing Technologies 9th International Conference, PaCT 2007, Pereslavl-Zalessky, Russia, September 3-7, 2007, Proceedings /

Pubblicazione 2007

Sommario: “... of Optimal Matrix Partitioning for Parallel Dense Factorization on Heterogeneous Processors -- Parallel...”
Testo

Elettronico eBook

3

Languages and Compilers for Parallel Computing 18th International Workshop, LCPC 2005, Hawthorne, NY, USA, October 20-22, 2005, Revised Selected Papers /

Pubblicazione 2006

Sommario: “... Domain Specific Language on Network Processors -- Array Replication to Increase Parallelism...”
Testo

Elettronico eBook

4

Algorithms and Architectures for Parallel Processing 10th International Conference, ICA3PP 2010, Busan, Korea, May 21-23, 2010. Proceedings, Part I /

Pubblicazione 2010

Sommario: “... Linear Array -- Parallel Prefix Computation in the Recursive Dual-Net -- A Two-Phase Differential...”
Testo

Elettronico eBook

5

Parallel Processing and Applied Mathematics, Part II 8th International Conference, PPAM 2009, Wroclaw, Poland, September 13-16, 2009, Proceedings /

Pubblicazione 2010

Sommario: “...Workshop on Scheduling for Parallel Computing (SPC 2009) -- Fully Polynomial Time Approximation...”
Testo

Elettronico eBook

6

Embedded Computer Systems: Architectures, Modeling, and Simulation 6th International Workshop, SAMOS 2006, Samos, Greece, July 17-20, 2006, Proceedings /

Pubblicazione 2006

Sommario: “... Spaces with Massively Parallel Embedded Processors -- Efficient Automated Clock Gating Using CoDeL...”
Testo

Elettronico eBook

7

High Performance Embedded Architectures and Compilers Third International Conference, HiPEAC 2008, Göteborg, Sweden, January 27-29, 2008, Proceedings /

Pubblicazione 2008

Sommario: “... Parallelism on Heterogeneous Multi-core Processors: A Case Study of the Cell BE -- IIa Reconfigurable - ASIP...”
Testo

Elettronico eBook

8

Embedded Computer Systems: Architectures, Modeling, and Simulation 8th International Workshop, SAMOS 2008, Samos, Greece, July 21-24, 2008, Proceedings /

Pubblicazione 2008

Sommario: “... -- to Programming Multicores -- Design Issues in Parallel Array Languages for Shared Memory -- An Architecture...”
Testo

Elettronico eBook

9

Computer Aided Systems Theory – EUROCAST 2005 10th International Conference on Computer Aided Systems Theory, Las Palmas de Gran Canaria, Spain, February 7-11, 2005, Revised Select...

Pubblicazione 2005

Sommario: “... Through Span Composition -- Degenerate Arrays: A Framework for Uncertain Data Tables -- Neural Network...”
Testo

Elettronico eBook

10

Embedded Computer Systems: Architectures, Modeling, and Simulation 7th International Workshop, SAMOS 2007, Samos, Greece, July 16-19, 2007, Proceedings /

Pubblicazione 2007

Sommario: “... on a Massively Parallel Embedded Processor -- Stream Image Processing on a Dual-Core Embedded System...”
Testo

Elettronico eBook

11

Evolvable Systems: From Biology to Hardware 7th International Conference, ICES 2007, Wuhan, China, September 21-23, 2007, Proceedings /

Pubblicazione 2007

Sommario: “... Cores to Evolve Combinational Logic Circuits in Parallel -- An Intrinsic Evolvable Hardware Based...”
Testo

Elettronico eBook

12

Reconfigurable Computing: Architectures, Tools and Applications 6th International Symposium, ARC 2010, Bangkok, Thailand, March 17-19, 2010, Proceedings /

Pubblicazione 2010

Sommario: “... -- Generic Systolic Array for Run-Time Scalable Cores -- Virtualization within a Parallel Array...”
Testo

Elettronico eBook

13

Artificial Evolution 9th International Conference, Evolution Artificielle, EA 2009, Strasbourg, France, October 26-28, 2009. Revised Selected Papers /

Pubblicazione 2010

Sommario: “... -- Parallelization of an Evolutionary Algorithm on a Platform with Multi-core Processors -- On the Difficulty...”
Testo

Elettronico eBook

14

High Performance Computing - HiPC 2008 15th International Conference, Bangalore, India, December 17-20, 2008, Proceedings /

Pubblicazione 2008

Sommario: “... Media -- The Excitement in Parallel Computing -- Session I: Performance Optimization -- Improving...”
Testo

Elettronico eBook

15

Architecture of Computing Systems - ARCS 2006 19th International Conference, Frankfurt/Main, Germany, March 13-16, 2006, Proceedings /

Pubblicazione 2006

Sommario: “... Destructive-Read DRAM -- A Processor Architecture with Effective Memory System for Sort-Last Parallel...”
Testo

Elettronico eBook

16

Large-Scale Scientific Computing 8th International Conference, LSSC 2011, Sozopol, Bulgaria, June 6-10th, 2011. Revised Selected Papers /

Pubblicazione 2012

Sommario: “... and Applications to Aerodynamics .-Processor Array Design with the Use of Genetic Algorithm.-A Hybrid Genetic...”
Testo

Elettronico eBook

17

VLSI-SoC: From Algorithms to Circuits and System-on-Chip Design 20th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2012, Santa Cruz, CA, USA,...

Pubblicazione 2013

Sommario: “... Programs for Functional Test and Diagnosis of VLIW Processors -- SEU-Aware Low-Power Memories Using a...”
Testo

Elettronico eBook

18

Applied Reconfigurable Computing 11th International Symposium, ARC 2015, Bochum, Germany, April 13-17, 2015, Proceedings /

Pubblicazione 2015

Sommario: “... on an Optically Reconfigurable Gate Array -- Exploring Dynamic Reconfigurable CORDIC Co-Processors Tightly Coupled...”
Testo

Elettronico eBook

19

Emerging Trends in Computing and Communication ETCC 2014, March 22-23, 2014 /

Pubblicazione 2014

Sommario: “... -- Exploring Chaotic Neural Network for Cryptographic Hash Function -- Protocol to Authenticate the Objects...”
Testo

Elettronico eBook

20

Embedded System Design: Topics, Techniques and Trends IFIP TC10 Working Conference: International Embedded Systems Symposium (IESS), May 30 - June 1, 2007, Irvine (CA), USA /

Pubblicazione 2007

Sommario: “...-Processor Systems with Static Priorities -- Approach for a Formal Verification of a Bit-serial Pipelined...”
Testo

Elettronico eBook

Restringi la ricerca