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processor hardware » processing hardware , microprocessor hardware , processor software
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Multicore Systems On-Chip: Practical Software/Hardware Design

by Ben Abdallah, Abderazek., Ben Abdallah, Abderazek.
Published 2013

Table of Contents: “... NoCs -- Parallelizing Compiler for Single and Multicore Computing -- Power Optimization Techniques...”
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Network and Parallel Computing IFIP International Conference, NPC 2010, Zhengzhou, China, September 13-15, 2010, Proceedings /

Published 2010

Table of Contents: “... References on Cell Multicore Processor -- Software-Hardware Cooperative DRAM Bank Partitioning for Chip...”
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Evolvable Systems: From Biology to Hardware 7th International Conference, ICES 2007, Wuhan, China, September 21-23, 2007, Proceedings /

Published 2007

Table of Contents: “... Cores to Evolve Combinational Logic Circuits in Parallel -- An Intrinsic Evolvable Hardware Based...”
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Correct Hardware Design and Verification Methods 13th IFIP WG 10.5Advanced Research, Working...

Published 2005

Table of Contents: “... for Pipelined Processors with Multicycle Functional Units -- Algorithms and Techniques for Speeding (DD-Based...”
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Parallel Computing Technologies 9th International Conference, PaCT 2007, Pereslavl-Zalessky, Russia, September 3-7, 2007, Proceedings /

Published 2007

Table of Contents: “... of Optimal Matrix Partitioning for Parallel Dense Factorization on Heterogeneous Processors -- Parallel...”
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Languages and Compilers for Parallel Computing 22nd International Workshop, LCPC 2009, Newark, DE, USA, October 8-10, 2009, Revised Selected Papers /

Published 2010

Table of Contents: “...A Communication Framework for Fault-Tolerant Parallel Execution -- The STAPL pList -- Hardware...”
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Algorithms and Architectures for Parallel Processing 10th International Conference, ICA3PP 2010, Busan, Korea, May 21-23, 2010. Workshops, Part II /

Published 2010

Table of Contents: “... Grove and Its Distributed Performance -- A Massively Parallel Hardware for Modular Exponentiations Using...”
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Euro-Par 2009, Parallel Processing - Workshops HPPC, HeteroPar, PROPER, ROIA, UNICORE, VHPC, Delft, The Netherlands, August 25-28, 2009, Workshops /

Published 2010

Table of Contents: “... on Heterogeneous Processors Based on Their Functional Performance Models -- Accelerating S3D: A GPGPU Case Study...”
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Parallel Processing and Applied Mathematics, Part II 8th International Conference, PPAM 2009, Wroclaw, Poland, September 13-16, 2009, Proceedings /

Published 2010

Table of Contents: “... of Industrial Simulation Codes from HPC Environments to New Hardware Technologies -- Application of Parallel...”
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Embedded Computer Systems: Architectures, Modeling, and Simulation 6th International Workshop, SAMOS 2006, Samos, Greece, July 17-20, 2006, Proceedings /

Published 2006

Table of Contents: “... Spaces with Massively Parallel Embedded Processors -- Efficient Automated Clock Gating Using CoDeL...”
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Reconfigurable Computing: Architectures, Tools, and Applications 4th International Workshop, ARC 2008, London, UK, March 26-28, 2008, Proceedings /

Published 2008

Table of Contents: “... on an Adaptive Image Sensor -- A Parallel Hardware Architecture for Image Feature Detection -- Reconfigurable HW...”
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Embedded Computer Systems: Architectures, Modeling, and Simulation 8th International Workshop, SAMOS 2008, Samos, Greece, July 21-24, 2008, Proceedings /

Published 2008

Table of Contents: “... Different Cache Levels in a Soft Real-Time SMT Processor -- Impact of Software Bypassing on Instruction...”
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Embedded Computer Systems: Architectures, Modeling, and Simulation 7th International Workshop, SAMOS 2007, Samos, Greece, July 16-19, 2007, Proceedings /

Published 2007

Table of Contents: “... on a Massively Parallel Embedded Processor -- Stream Image Processing on a Dual-Core Embedded System...”
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VLSI-SoC: From Algorithms to Circuits and System-on-Chip Design 20th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2012, Santa Cruz, CA, USA,...

Published 2013

Table of Contents: “... Programs for Functional Test and Diagnosis of VLIW Processors -- SEU-Aware Low-Power Memories Using a...”
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Distributed Algorithms for Message-Passing Systems

by Raynal, Michel., Raynal, Michel.
Published 2013

Table of Contents: “... -- Chap. 2 Distributed Graph Algorithms -- Chap. 3 An Algorithmic Framework to Compute Global Functions...”
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Dependable Computing - EDCC 2005 5th European Dependable Computing Conference, Budapest, Hungary, April 20-22, 2005, Proceedings /

Published 2005

Table of Contents: “... Configuration for QoS in Reliable Parallel Servers -- Session 2A: Practical Experience Reports and Tools I...”
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Turbo Decoder Architecture for Beyond-4G Applications

by Wong, Cheng-Chi., Wong, Cheng-Chi., Chang, Hsie-Chia.
Published 2014

Table of Contents: “...Introduction -- Conventional Architecture of Turbo Decoder -- Turbo Decoder with Parallel...”
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Applied Reconfigurable Computing 11th International Symposium, ARC 2015, Bochum, Germany, April 13-17, 2015, Proceedings /

Published 2015

Table of Contents: “... -- Hierarchical Dynamic Power-Gating in FPGAs -- Tools and Compilers -- Hardware Synthesis from Functional...”
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Platform Based Design at the Electronic System Level Industry Perspectives and Experiences /

Published 2006

Table of Contents: “... -- The Configurable Processor View of Platform Provision -- Peripheral Modeling for Platform Driven ESL Design...”
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Design of Embedded Control Systems

Published 2005

Table of Contents: “... Prediction for Embedded Processors Using an ADL -- Verification of Control Paths Using Petri Nets -- Memory...”
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