1
Published 2005
Table of Contents: ... without Trusted Parties -- Scheduling Parallel Tasks onto Numa Multiprocessors with Inter-Processor...
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2
Published 2005
Table of Contents: ... Optical Networks -- A Parallel O(n27n/8) Time-Memory-Processor Tradeoff for Knapsack-Like Problems...
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3
Published 2007
Table of Contents: ... of Optimal Matrix Partitioning for Parallel Dense Factorization on Heterogeneous Processors -- Parallel...
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4
Published 2010
Table of Contents: ...A Communication Framework for Fault-Tolerant Parallel Execution -- The STAPL pList -- Hardware...
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5
Published 2010
Table of Contents: ... Synchronization Algorithm for Remote Files -- A New Parallel Method of Smith-Waterman Algorithm on a Heterogeneous...
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6
Published 2010
Table of Contents: ...The 2010 International Symposium on Frontiers of Parallel and Distributed Computing (FPDC 2010...
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7
Published 2010
Table of Contents: ... of Industrial Simulation Codes from HPC Environments to New Hardware Technologies -- Application of Parallel...
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8
by Freeman, Adam., Freeman, Adam.
Published 2010
Table of Contents: ...Introducing Parallel Programming -- Task Programming Hibernate -- Sharing Data -- Coordinating...
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9
Table of Contents: ... NoCs -- Parallelizing Compiler for Single and Multicore Computing -- Power Optimization Techniques...
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10
Table of Contents: ...Introduction -- Conventional Architecture of Turbo Decoder -- Turbo Decoder with Parallel...
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11
Table of Contents: ... Management -- Imperative and Object-Oriented Programs -- Functional Programs -- Logic Programs -- Parallel...
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12
Published 2006
Table of Contents: ... Nodes -- Transient Processor/Bus Fault Tolerance for Embedded Systems -- Distributed Timed Multitasking...
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13
Published 2006
Table of Contents: ... Spaces with Massively Parallel Embedded Processors -- Efficient Automated Clock Gating Using CoDeL...
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14
Published 2005
Table of Contents: ...Keynote Talk -- Exploiting Multiple Levels of Parallelism in Scientific Computing -- Distributed...
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15
Published 2005
Table of Contents: ... Prediction for Embedded Processors Using an ADL -- Verification of Control Paths Using Petri Nets -- Memory...
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16
Published 2008
Table of Contents: ... Efficient Parallel Matrix-Matrix Multiplication on the Torus -- A New Dynamic Load Balancing Technique...
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17
Published 2008
Table of Contents: ...Keynotes -- Synthesizing FPGA Circuits from Parallel Programs -- From Silicon to Science: The Long...
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18
Published 2006
Table of Contents: ... for SMT Processors -- The New BCD Subtractor and Its Reversible Logic Implementation -- Power-Efficient...
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19
Published 2005
Table of Contents: ... Information -- Intelligent Information Systems -- On Recursive Functions and Well–Founded Relations...
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20
Published 2008
Table of Contents: ... Different Cache Levels in a Soft Real-Time SMT Processor -- Impact of Software Bypassing on Instruction...
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