Rezultati - parallel processor structure functionals function https*

Poišči alternative:
structure functionals » structure functional , structure functions , structured functional
functionals function » function function , functions functional , function dysfunction
processor structure » process structure , processes structure , processes structures
parallel processor » parallel processors , parallel processes , parallel process
function https » functions https , fiction https

Languages and Compilers for Parallel Computing 18th International Workshop, LCPC 2005, Hawthorne, NY, USA, October 20-22, 2005, Revised Selected Papers /

Izdano 2006

Kazalo: “... Domain Specific Language on Network Processors -- Array Replication to Increase Parallelism...”
Polni tekst

Elektronski eKnjiga

Languages and Compilers for Parallel Computing 22nd International Workshop, LCPC 2009, Newark, DE, USA, October 8-10, 2009, Revised Selected Papers /

Izdano 2010

Kazalo: “...A Communication Framework for Fault-Tolerant Parallel Execution -- The STAPL pList -- Hardware...”
Polni tekst

Elektronski eKnjiga

Network and Parallel Computing IFIP International Conference, NPC 2005, Beijing, China, November 30 - December 3, 2005, Proceedings /

Izdano 2005

Kazalo: “... Optical Networks -- A Parallel O(n27n/8) Time-Memory-Processor Tradeoff for Knapsack-Like Problems...”
Polni tekst

Elektronski eKnjiga

Parallel Computing Technologies 9th International Conference, PaCT 2007, Pereslavl-Zalessky, Russia, September 3-7, 2007, Proceedings /

Izdano 2007

Kazalo: “... and Consensus -- A Functional Programming System SFP: Sisal 3.1 Language Structures Decomposition -- Towards a...”
Polni tekst

Elektronski eKnjiga

Parallel Processing and Applied Mathematics, Part II 8th International Conference, PPAM 2009, Wroclaw, Poland, September 13-16, 2009, Proceedings /

Izdano 2010

Kazalo: “... and Engineering -- Parallelized Transient Elastic Wave Propagation in Orthotropic Structures -- Parallel Numerical...”
Polni tekst

Elektronski eKnjiga

Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation 17th International Workshop, PATMOS 2007, Gothenburg, Sweden, September 3-5, 2007, Proc...

Izdano 2007

Kazalo: “... on the TTA -- Asynchronous Functional Coupling for Low Power Sensor Network Processors -- A Heuristic...”
Polni tekst

Elektronski eKnjiga

Turbo Decoder Architecture for Beyond-4G Applications

od Wong, Cheng-Chi., Wong, Cheng-Chi., Chang, Hsie-Chia.
Izdano 2014

Kazalo: “...Introduction -- Conventional Architecture of Turbo Decoder -- Turbo Decoder with Parallel...”
Polni tekst

Elektronski eKnjiga

MULTICORE SYSTEMS ON-CHIP

od Abderazek, Ben Abadallah., Abderazek, Ben Abadallah.
Izdano 2010

Kazalo: “...- and Many-Core Systems -- Parallelizing Compiler for High Performance Computing -- Dual-Execution Processor...”
Polni tekst

Elektronski eKnjiga

Design of Embedded Control Systems

Izdano 2005

Kazalo: “... for Parallel Embedded Systems -- Remarks on Parallel Bit-Byte CPU Structures of the Programmable Logic...”
Polni tekst

Elektronski eKnjiga

High Performance Embedded Architectures and Compilers Third International Conference, HiPEAC 2008, Göteborg, Sweden, January 27-29, 2008, Proceedings /

Izdano 2008

Kazalo: “... Parallelism on Heterogeneous Multi-core Processors: A Case Study of the Cell BE -- IIa Reconfigurable - ASIP...”
Polni tekst

Elektronski eKnjiga

Advances in Computer Systems Architecture 11th Asia-Pacific Conference, ACSAC 2006, Shanghai, China, September 6-8, 2006, Proceedings /

Izdano 2006

Kazalo: “... for Coordinating Data-Parallel Programs (Position Statement) -- Implementations of Square-Root and Exponential...”
Polni tekst

Elektronski eKnjiga

Advances in Computer Systems Architecture 12th Asia-Pacific Conference, ACSAC 2007, Seoul, Korea, August 23-25, 2007, Proceedings /

Izdano 2007

Kazalo: “... Processor Architecture Using Asynchronous Function Units -- A Bypass Mechanism to Enhance Branch Predictor...”
Polni tekst

Elektronski eKnjiga

Distributed Computing 28th International Symposium DISC 2014, Austin, TX, USA, October 12-15, 2014, Proceedings /

Izdano 2014

Kazalo: “... for Scheduling and Designing Heterogeneous Processors for Interactive Applications -- Graph Distances and Routing...”
Polni tekst

Elektronski eKnjiga

Transactions on High-Performance Embedded Architectures and Compilers IV

Izdano 2011

Kazalo: “... Transactional Memory -- A Parallelizing Compiler Cooperative Heterogeneous Multicore Processor Architecture -- A...”
Polni tekst

Elektronski eKnjiga

Advances in Information Processing and Protection

Izdano 2007

Kazalo: “... -- Multiple Error Detection in Substitution Blocks for Block Ciphers -- Parallelization Method of Encryption...”
Polni tekst

Elektronski eKnjiga

High-Performance Computing 6th International Symposium, ISHPC 2005, Nara, Japan, September 7-9, 2005, First International Workshop on Advance Low Power Systems, ALPS 2006, Revised...

Izdano 2008

Kazalo: “... -- Exploiting Execution Locality with a Decoupled Kilo-Instruction Processor -- Decoupled State-Execute...”
Polni tekst

Elektronski eKnjiga

Reconfigurable Computing: Architectures, Tools, and Applications 4th International Workshop, ARC 2008, London, UK, March 26-28, 2008, Proceedings /

Izdano 2008

Kazalo: “... Structure of 64-Bit Exponential Function Implemented in FPGAs -- A Framework for the Automatic Generation...”
Polni tekst

Elektronski eKnjiga

Computer Aided Systems Theory – EUROCAST 2005 10th International Conference on Computer Aided Systems Theory, Las Palmas de Gran Canaria, Spain, February 7-11, 2005, Revised Select...

Izdano 2005

Kazalo: “... Information -- Intelligent Information Systems -- On Recursive Functions and Well–Founded Relations...”
Polni tekst

Elektronski eKnjiga

Automata, Languages and Programming 35th International Colloquium, ICALP 2008 Reykjavik, Iceland, July 7-11, 2008 Proceedings, Part I /

Izdano 2008

Kazalo: “...Invited Lectures -- Graph Structure and Monadic Second-Order Logic: Language Theoretical Aspects...”
Polni tekst

Elektronski eKnjiga

VLSI-SoC: From Algorithms to Circuits and System-on-Chip Design 20th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2012, Santa Cruz, CA, USA,...

Izdano 2013

Kazalo: “... Programs for Functional Test and Diagnosis of VLIW Processors -- SEU-Aware Low-Power Memories Using a...”
Polni tekst

Elektronski eKnjiga

Zoži iskanje