Resultados de procura - parallel processors implementing functionality function https

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implementing functionality » implementing functional , implementing multifunctionality , implementing fertility
processors implementing » processes implementing , process implementing , processing implementing
functionality function » functionals function , functionaries function , functional functions
parallel processors » parallel processing
function https » functions https , fiction https

Network and Parallel Computing IFIP International Conference, NPC 2010, Zhengzhou, China, September 13-15, 2010, Proceedings /

Publicado 2010

Table of Contents: “...-Performance of Multi-core Processors -- Internet-Based Virtual Computing Environment -- Session 1...”
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Parallel Computing Technologies 9th International Conference, PaCT 2007, Pereslavl-Zalessky, Russia, September 3-7, 2007, Proceedings /

Publicado 2007

Table of Contents: “... to Sensor Acquired Information -- Parallel Broadband Finite Element Time Domain Algorithm Implemented...”
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Algorithms and Architectures for Parallel Processing 10th International Conference, ICA3PP 2010, Busan, Korea, May 21-23, 2010. Proceedings, Part I /

Publicado 2010

Table of Contents: “... in Distributed Environments by Simultaneous Fragmentation and Allocation -- Parallel Architectures -- Function...”
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Algorithms and Architectures for Parallel Processing 10th International Conference, ICA3PP 2010, Busan, Korea, May 21-23, 2010. Workshops, Part II /

Publicado 2010

Table of Contents: “...The 2010 International Symposium on Frontiers of Parallel and Distributed Computing (FPDC 2010...”
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New Horizons of Parallel and Distributed Computing

Publicado 2005

Table of Contents: “... without Trusted Parties -- Scheduling Parallel Tasks onto Numa Multiprocessors with Inter-Processor...”
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Network and Parallel Computing IFIP International Conference, NPC 2005, Beijing, China, November 30 - December 3, 2005, Proceedings /

Publicado 2005

Table of Contents: “... Optical Networks -- A Parallel O(n27n/8) Time-Memory-Processor Tradeoff for Knapsack-Like Problems...”
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Euro-Par 2009, Parallel Processing - Workshops HPPC, HeteroPar, PROPER, ROIA, UNICORE, VHPC, Delft, The Netherlands, August 25-28, 2009, Workshops /

Publicado 2010

Table of Contents: “... on Heterogeneous Processors Based on Their Functional Performance Models -- Accelerating S3D: A GPGPU Case Study...”
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Parallel Processing and Applied Mathematics, Part II 8th International Conference, PPAM 2009, Wroclaw, Poland, September 13-16, 2009, Proceedings /

Publicado 2010

Table of Contents: “... Simulations -- Parallel Implementation of a Steady State Thermal and Hydraulic Analysis of Pipe Networks...”
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From Model-Driven Design to Resource Management for Distributed Embedded Systems IFIP TC 10 Working Conference on Distributed and Parallel Embedded Systems (DIPES 2006) October 11-13, 2006, Braga, Portugal /

Publicado 2006

Table of Contents: “... Nodes -- Transient Processor/Bus Fault Tolerance for Embedded Systems -- Distributed Timed Multitasking...”
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Embedded Computer Systems: Architectures, Modeling, and Simulation 6th International Workshop, SAMOS 2006, Samos, Greece, July 17-20, 2006, Proceedings /

Publicado 2006

Table of Contents: “... Spaces with Massively Parallel Embedded Processors -- Efficient Automated Clock Gating Using CoDeL...”
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High Performance Embedded Architectures and Compilers Third International Conference, HiPEAC 2008, Göteborg, Sweden, January 27-29, 2008, Proceedings /

Publicado 2008

Table of Contents: “... Parallelism on Heterogeneous Multi-core Processors: A Case Study of the Cell BE -- IIa Reconfigurable - ASIP...”
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Reconfigurable Computing: Architectures, Tools, and Applications 4th International Workshop, ARC 2008, London, UK, March 26-28, 2008, Proceedings /

Publicado 2008

Table of Contents: “... Structure of 64-Bit Exponential Function Implemented in FPGAs -- A Framework for the Automatic Generation...”
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Advances in Computer Systems Architecture 11th Asia-Pacific Conference, ACSAC 2006, Shanghai, China, September 6-8, 2006, Proceedings /

Publicado 2006

Table of Contents: “... for Coordinating Data-Parallel Programs (Position Statement) -- Implementations of Square-Root and Exponential...”
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Embedded Computer Systems: Architectures, Modeling, and Simulation 8th International Workshop, SAMOS 2008, Samos, Greece, July 21-24, 2008, Proceedings /

Publicado 2008

Table of Contents: “... Different Cache Levels in a Soft Real-Time SMT Processor -- Impact of Software Bypassing on Instruction...”
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Embedded Computer Systems: Architectures, Modeling, and Simulation 7th International Workshop, SAMOS 2007, Samos, Greece, July 16-19, 2007, Proceedings /

Publicado 2007

Table of Contents: “... on a Massively Parallel Embedded Processor -- Stream Image Processing on a Dual-Core Embedded System...”
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Advances in Computer Systems Architecture 12th Asia-Pacific Conference, ACSAC 2007, Seoul, Korea, August 23-25, 2007, Proceedings /

Publicado 2007

Table of Contents: “... Processor Architecture Using Asynchronous Function Units -- A Bypass Mechanism to Enhance Branch Predictor...”
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Turbo Decoder Architecture for Beyond-4G Applications

por Wong, Cheng-Chi., Wong, Cheng-Chi., Chang, Hsie-Chia.
Publicado 2014

Table of Contents: “...Introduction -- Conventional Architecture of Turbo Decoder -- Turbo Decoder with Parallel...”
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Platform Based Design at the Electronic System Level Industry Perspectives and Experiences /

Publicado 2006

Table of Contents: “... -- The Configurable Processor View of Platform Provision -- Peripheral Modeling for Platform Driven ESL Design...”
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VLSI-SoC: From Algorithms to Circuits and System-on-Chip Design 20th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2012, Santa Cruz, CA, USA,...

Publicado 2013

Table of Contents: “... Programs for Functional Test and Diagnosis of VLIW Processors -- SEU-Aware Low-Power Memories Using a...”
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Advanced Techniques in Computing Sciences and Software Engineering

Publicado 2010

Table of Contents: “...Bridging Calculus and Statistics: Null - Hypotheses Underlain by Functional Equations...”
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