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Parallel Processing and Applied Mathematics, Part II 8th International Conference, PPAM 2009, Wroclaw, Poland, September 13-16, 2009, Proceedings /

Published 2010

Table of Contents: “... of Causality Requirements in Java Memory Model Is Undecidable -- A Team Object for CoArray Fortran...”
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Emerging Trends in Computing and Communication ETCC 2014, March 22-23, 2014 /

Published 2014

Table of Contents: “... to Identify Information Domain -- Analysis of Multithreading in Java for Symbolic Computation on Multicore...”
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Embedded Computer Systems: Architectures, Modeling, and Simulation 6th International Workshop, SAMOS 2006, Samos, Greece, July 17-20, 2006, Proceedings /

Published 2006

Table of Contents: “... -- Processor Design -- Code Size Reduction by Compiler Tuning -- Energy Optimization of a Multi-bank Main...”
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High Performance Embedded Architectures and Compilers Third International Conference, HiPEAC 2008, Göteborg, Sweden, January 27-29, 2008, Proceedings /

Published 2008

Table of Contents: “... Processing -- rMPI: Message Passing on Multicore Processors with On-Chip Interconnect -- Modeling Multigrain...”
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Embedded Computer Systems: Architectures, Modeling, and Simulation 5th International Workshop, SAMOS 2005, Samos, Greece, July 18-20, Proceedings /

Published 2005

Table of Contents: “... Multiple Operation Array -- RAPANUI: Rapid Prototyping for Media Processor Architecture Exploration -- Data...”
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Embedded Computer Systems: Architectures, Modeling, and Simulation 7th International Workshop, SAMOS 2007, Samos, Greece, July 16-19, 2007, Proceedings /

Published 2007

Table of Contents: “... on a Massively Parallel Embedded Processor -- Stream Image Processing on a Dual-Core Embedded System...”
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High Performance Computing – HiPC 2005 12th International Conference, Goa, India, December 18-21, 2005, Proceedings /

Published 2005

Table of Contents: “... to Network Processor for Parallel Query Processing in Cluster of Workstations -- A High-Speed VLSI Array...”
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VLSI-SOC: From Systems to Chips IFIP TC 10/WG 10.5, Twelfth International Conference on Very Large Scale Ingegration of System on Chip (VLSI-SoC 2003), December 1-3, 2003, Darmstad...

Published 2006

Table of Contents: “... Verification Using Assertion Processors -- Run-Time FPGA Reconfiguration for Power-/Cost-Optimized Real-time...”
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