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Algorithms and Architectures for Parallel Processing 10th International Conference, ICA3PP 2010, Busan, Korea, May 21-23, 2010. Proceedings, Part I /

Published 2010

Table of Contents: “... Algorithm for Chip Multiprocessor -- Efficient Partitioning of Static Buses for Processor Arrays of Small...”
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Reconfigurable Computing: Architectures and Applications Second International Workshop, ARC 2006, Delft, The Netherlands, March 1-3, 2006 Revised Selected Papers /

Published 2006

Table of Contents: “...-Embedded Processors -- Dynamic Partial Reconfigurable FIR Filter Design -- Event-Driven Simulation Engine...”
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Network and Parallel Computing IFIP International Conference, NPC 2005, Beijing, China, November 30 - December 3, 2005, Proceedings /

Published 2005

Table of Contents: “... Pipeline Web Server -- QoS Aware Service Composition with Multiple Quality Constraints -- Session 4...”
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High Performance Computing - HiPC 2008 15th International Conference, Bangalore, India, December 17-20, 2008, Proceedings /

Published 2008

Table of Contents: “... Performance of Digest Caches in Network Processors -- Optimization of BLAS on the Cell Processor -- Fine...”
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Advanced Electrical and Electronics Engineering Volume 2 /

Published 2011

Table of Contents: “... operation -- Customized Processor Architecture for Model Predictive Control in Magnetic Actuated Small...”
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High Performance Computing and Communications Third International Conference, HPCC 2007, Houston, USA, September 26-28, 2007, Proceedings /

Published 2007

Table of Contents: “... -- The Changing Impact of Semiconductor Technology on Processor Architecture -- Cluster Computing -- A Windows...”
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Emerging Technologies for Information Systems, Computing, and Management

Published 2013

Table of Contents: “... Synthesis of Circular Arrays Based on the Niche Genetic Algorithm -- The Application of Wavelet Analysis...”
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High Performance Computing - HiPC 2004 11th International Conference, Bangalore, India, December 19-22, 2004, Proceedings /

Published 2005

Table of Contents: “... Point Using Intel’s IXP1200 Network Processor -- MuSeQoR: Multi-path Failure-Tolerant Security-Aware QoS...”
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Large-Scale Scientific Computing 8th International Conference, LSSC 2011, Sozopol, Bulgaria, June 6-10th, 2011. Revised Selected Papers /

Published 2012

Table of Contents: “... and Applications to Aerodynamics .-Processor Array Design with the Use of Genetic Algorithm.-A Hybrid Genetic...”
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