1
Table of Contents: ...Context and State-of-the-Art -- Processor Template for the Wireless Domain -- Case Study 1: MIMO...
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2
Subjects: ...Computational Biology/Bioinformatics. https://scigraph.springernature.com/ontologies/product-market...
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3
Table of Contents: ...Overview -- Processor Design Issues -- RISC Principles -- Architectures -- MIPS Architecture...
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4
Published 2013
Table of Contents: ... for Bioinformatics Applications -- High-Performance Computing for Neuroinformatics using FPGA -- High-Performance...
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5
Published 2010
Table of Contents: ...Processors -- Design of High Performance Low Power Microprocessors -- Towards High-Performance...
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6
Published 2006
Table of Contents: ...FPGA Neurocomputers -- On the Arithmetic Precision for Implementing Back-Propagation Networks...
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7
by Fahim, Amr., Fahim, Amr.
Published 2005
Subjects: ...Circuits and Systems. https://scigraph.springernature.com/ontologies/product-market-codes/T24068...
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8
Table of Contents: ...Background -- Heterogeneous Multicore Architecture -- Processor Cores -- Chip Implementations...
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9
Subjects: ...Computer-Aided Engineering (CAD, CAE) and Design. https://scigraph.springernature.com/ontologies...
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10
Table of Contents: ... Languages -- Architectural Design -- Project Design -- Hardware Implementations Using FPGA and I/O Boards...
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11
Table of Contents: ... -- Implementation of Wireless P2P Systems -- Computer Architecture -- Distributed and Parallel Algorithms...
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12
Published 2006
Table of Contents: ... Reconfigurable Processor -- Trigonometric Computing Embedded in a Dynamically Reconfigurable CORDIC System...
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13
Published 2005
Table of Contents: ...Keynote Address I -- Processor Architecture for Trustworthy Computers -- Session 1A: Energy...
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14
Published 2006
Table of Contents: ... -- Scientific Computing Applications on the Imagine Stream Processor -- Enhancing Last-Level Cache Performance...
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15
Table of Contents: ... -- Interprocess Communication Using Message Passing -- TCP/UDP Communication in Java -- Interprocess Communication...
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16
Published 2007
Table of Contents: ... Processor Architecture Using Asynchronous Function Units -- A Bypass Mechanism to Enhance Branch Predictor...
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17
Published 2012
Table of Contents: ... Processor System -- 11. Mathematical Model Implementation for Simulation Purposes -- 12. Plant-wide Control...
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18
Published 2006
Table of Contents: ... Spaces with Massively Parallel Embedded Processors -- Efficient Automated Clock Gating Using CoDeL...
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19
Published 2007
Table of Contents: ... Data Reuse for Windowing Computations: Performance Modeling for FPGA Implementations -- Optimized...
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20
Table of Contents: ...Introduction -- IEC 61499 in a Nutshell -- Introduction to Synchronous Programming Using Esterel...
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