1
Published 2015
Table of Contents: ... -- Hierarchical Dynamic Power-Gating in FPGAs -- Tools and Compilers -- Hardware Synthesis from Functional...
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2
Published 2010
Table of Contents: ... -- Generic Systolic Array for Run-Time Scalable Cores -- Virtualization within a Parallel Array...
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Electronic eBook
3
Published 2005
Table of Contents: ...: Cluster Computing -- Performance Modelling and Optimization of Memory Access on Cellular Computer...
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Electronic eBook
4
Published 2007
Table of Contents: ...-Constraint-Driven Instruction Scheduler for Post-compiling Optimization of Embedded Code -- Improving...
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Electronic eBook
5
Published 2013
Table of Contents: ... in Automobiles -- Using the Gate-Diffusion Input Technique for Low Power Programmable Logic Array Design -- Using...
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Electronic eBook