Search Results - programming microprocessor using process array https

1

Published 2010

Table of Contents: “... Reconfigurable Array Architectures -- Multi-core Systems on Chip -- DSP Systems using Three-Dimensional (3D...”
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2

DSP Architecture Design Essentials

by Marković, Dejan., Marković, Dejan., Brodersen, Robert W.
Published 2012

Subjects: “...Signal, Image and Speech Processing. https://scigraph.springernature.com/ontologies/product-market...”
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3

Hardware/Software Co-design for Heterogeneous Multi-core Platforms The hArtes Toolchain /

Published 2012

Table of Contents: “...Introduction -- ThArtes Toolchain -- The hArtes Platform -- Audio Array Processing for Telepresence...”
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4

High Performance Embedded Architectures and Compilers Third International Conference, HiPEAC 2008, Göteborg, Sweden, January 27-29, 2008, Proceedings /

Published 2008

Table of Contents: “...Invited Program -- Supercomputing for the Future, Supercomputing from the Past (Keynote) -- I...”
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5

Applications of Evolutionary Computing Evoworkshops: EvoBIO, EvoCOMNET, EvoHot, EvoIASP, EvoMUSART, and EvoSTOC /

Published 2005

Table of Contents: “... Processing Filters -- Learning Weights in Genetic Programs Using Gradient Descent for Object Recognition...”
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6

Languages and Compilers for Parallel Computing 15th Workshop, LCPC 2002, College Park, MD, USA, July 25-27, 2002, Revised Papers /

Published 2005

Table of Contents: “... Communication Only Placements and Their Use for Parallel Program Construction -- Hierarchical Parallelism...”
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7

Intelligent Technologies and Engineering Systems

Published 2013

Table of Contents: “... Neural Network Classifier -- Optimization Path Programming Using Improved Multi-Group Ant Colony...”
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8

Reconfigurable Computing: Architectures, Tools and Applications 6th International Symposium, ARC 2010, Bangkok, Thailand, March 17-19, 2010, Proceedings /

Published 2010

Table of Contents: “... for Tera-Scale Multi-core Microprocessors -- Process Variability and Degradation: New Frontier...”
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9

High Performance Computing – HiPC 2005 12th International Conference, Goa, India, December 18-21, 2005, Proceedings /

Published 2005

Table of Contents: “... to Network Processor for Parallel Query Processing in Cluster of Workstations -- A High-Speed VLSI Array...”
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10

Computer Aided Systems Theory – EUROCAST 2005 10th International Conference on Computer Aided Systems Theory, Las Palmas de Gran Canaria, Spain, February 7-11, 2005, Revised Select...

Published 2005

Table of Contents: “... Through Span Composition -- Degenerate Arrays: A Framework for Uncertain Data Tables -- Neural Network...”
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11

Reconfigurable Computing: Architectures and Applications Second International Workshop, ARC 2006, Delft, The Netherlands, March 1-3, 2006 Revised Selected Papers /

Published 2006

Table of Contents: “... Reconfigurable Array: Dataflow Execution with Software Compatibility -- High-Level Synthesis Using SPARK...”
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12

Embedded Computer Systems: Architectures, Modeling, and Simulation 6th International Workshop, SAMOS 2006, Samos, Greece, July 17-20, 2006, Proceedings /

Published 2006

Table of Contents: “... Processors -- SAD Prefetching for MPEG4 Using Flux Caches -- Effects of Program Compression -- Integrated...”
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13

Embedded Computer Systems: Architectures, Modeling, and Simulation 8th International Workshop, SAMOS 2008, Samos, Greece, July 21-24, 2008, Proceedings /

Published 2008

Table of Contents: “... Transmitter: A Fast Design Cycle Using OFDM Framework in Bluespec -- SoC -- A Real-Time Programming Model...”
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14

Embedded Computer Systems: Architectures, Modeling, and Simulation 5th International Workshop, SAMOS 2005, Samos, Greece, July 18-20, Proceedings /

Published 2005

Table of Contents: “... -- A Programming Model for an Embedded Media Processing Architecture -- Automatic ADL-Based Assembler...”
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15

Embedded Computer Systems: Architectures, Modeling, and Simulation 7th International Workshop, SAMOS 2007, Samos, Greece, July 16-19, 2007, Proceedings /

Published 2007

Table of Contents: “...-Energy Embedded Multiprocessors -- Scheduling & Programming Models -- An Automatically-Retargetable Time...”
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16

High Performance Computing - HiPC 2004 11th International Conference, Bangalore, India, December 19-22, 2004, Proceedings /

Published 2005

Table of Contents: “... Encoder Using Overlapped Block Transferring and Pipelined Processing -- Session VI - Grids and Storage...”
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17

Embedded System Design: Topics, Techniques and Trends IFIP TC10 Working Conference: International Embedded Systems Symposium (IESS), May 30 - June 1, 2007, Irvine (CA), USA /

Published 2007

Table of Contents: “... -- Using a Runtime Measurement Device with Measurement-Based WCET Analysis -- Implementing Real-Time...”
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