High-Level Verification Methods and Tools for Verification of System-Level Designs /
This book looks at the problem of design verification with a view towards speeding up the process of verification by developing methods that apply to levels of abstraction above RTL or synchronous logic descriptions. Typically such descriptions capture design functionality at the system level, hence...
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| Main Authors: | , , |
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| 企业作者: | |
| 格式: | 电子 电子书 |
| 语言: | English |
| 出版: |
New York, NY :
Springer New York : Imprint: Springer,
2011.
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| 版: | 1st ed. 2011. |
| 主题: | |
| 在线阅读: | https://doi.org/10.1007/978-1-4419-9359-5 |
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