Low Power Interconnect Design
This book provides practical solutions for delay and power reduction for on-chip interconnects and buses. It provides an in depth description of the problem of signal delay and extra power consumption, possible solutions for delay and glitch removal, while considering the power reduction of the tot...
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| 第一著者: | |
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| 団体著者: | |
| フォーマット: | 電子媒体 eBook |
| 言語: | English |
| 出版事項: |
New York, NY :
Springer New York : Imprint: Springer,
2015.
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| 版: | 1st ed. 2015. |
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| オンライン･アクセス: | https://doi.org/10.1007/978-1-4614-1323-3 |
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目次:
- Part I Basics of Interconnect Design
- Introduction to Interconnects
- CMOS Buffer
- Part II Buffer and Schmidt trigger Insertion Techniques for Low Power Interconnect Design
- Buffer Insertion as a Solution to Interconnect Issues
- Schmidt Trigger Approach
- Part III Bus Coding Techniques for Low Power Interconnect Design
- Bus Coding Techniques.