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Power consumption optimization technique in ACS for space time trellis code viterbi decoder

To provide fast digital communications systems, energy efficient, high-performance, low power is critical for decoding mobile receiver device. This paper proposes a low power optimization techniques in the Add Compare Select (ACS) unit for Space Time trellis codes (STTC) Viterbi decoder. STTC Viterb...

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Main Authors: Abu, Mohd Azlan, Harun, Harlisya, Harmin, Mohammad Yazdi, Abdul Wahab, Noor Izzri
Format: Article
Language:English
Published: Trans Tech Publications 2015
Online Access:http://psasir.upm.edu.my/id/eprint/45918/1/Power%20consumption%20optimization%20technique%20in%20ACS%20for%20space%20time%20trellis%20code%20viterbi%20decoder.pdf
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id oai:psasir.upm.edu.my:45918
record_format eprints
spelling oai:psasir.upm.edu.my:45918 http://psasir.upm.edu.my/id/eprint/45918/ Power consumption optimization technique in ACS for space time trellis code viterbi decoder Abu, Mohd Azlan Harun, Harlisya Harmin, Mohammad Yazdi Abdul Wahab, Noor Izzri To provide fast digital communications systems, energy efficient, high-performance, low power is critical for decoding mobile receiver device. This paper proposes a low power optimization techniques in the Add Compare Select (ACS) unit for Space Time trellis codes (STTC) Viterbi decoder. STTC Viterbi decoder is used as a reference case. This paper discusses about how to lower the power in the ACS architecture, to optimize the Viterbi decoder STTC in reducing the total power consumption. Based on the results of design and analysis, power consumption Viterbi decoder modeling, low power system for STTC Viterbi decoder is proposed. Design and optimization of ACS unit in STTC Viterbi decoding is done using Verilog HDL language. Power analysis tools in the software Altera Quartus 2 is used for the synthesis of total system power consumption. Optimization strategy showed an increase of 83% power reduction compared to previous studies. Trans Tech Publications 2015 Article PeerReviewed text en http://psasir.upm.edu.my/id/eprint/45918/1/Power%20consumption%20optimization%20technique%20in%20ACS%20for%20space%20time%20trellis%20code%20viterbi%20decoder.pdf Abu, Mohd Azlan and Harun, Harlisya and Harmin, Mohammad Yazdi and Abdul Wahab, Noor Izzri (2015) Power consumption optimization technique in ACS for space time trellis code viterbi decoder. Applied Mechanics and Materials, 785. pp. 734-738. ISSN 1660-9336; ESSN: 1662-7482 10.4028/www.scientific.net/AMM.785.734
institution UPM IR
collection UPM IR
language English
description To provide fast digital communications systems, energy efficient, high-performance, low power is critical for decoding mobile receiver device. This paper proposes a low power optimization techniques in the Add Compare Select (ACS) unit for Space Time trellis codes (STTC) Viterbi decoder. STTC Viterbi decoder is used as a reference case. This paper discusses about how to lower the power in the ACS architecture, to optimize the Viterbi decoder STTC in reducing the total power consumption. Based on the results of design and analysis, power consumption Viterbi decoder modeling, low power system for STTC Viterbi decoder is proposed. Design and optimization of ACS unit in STTC Viterbi decoding is done using Verilog HDL language. Power analysis tools in the software Altera Quartus 2 is used for the synthesis of total system power consumption. Optimization strategy showed an increase of 83% power reduction compared to previous studies.
format Article
author Abu, Mohd Azlan
Harun, Harlisya
Harmin, Mohammad Yazdi
Abdul Wahab, Noor Izzri
spellingShingle Abu, Mohd Azlan
Harun, Harlisya
Harmin, Mohammad Yazdi
Abdul Wahab, Noor Izzri
Power consumption optimization technique in ACS for space time trellis code viterbi decoder
author_facet Abu, Mohd Azlan
Harun, Harlisya
Harmin, Mohammad Yazdi
Abdul Wahab, Noor Izzri
author_sort Abu, Mohd Azlan
title Power consumption optimization technique in ACS for space time trellis code viterbi decoder
title_short Power consumption optimization technique in ACS for space time trellis code viterbi decoder
title_full Power consumption optimization technique in ACS for space time trellis code viterbi decoder
title_fullStr Power consumption optimization technique in ACS for space time trellis code viterbi decoder
title_full_unstemmed Power consumption optimization technique in ACS for space time trellis code viterbi decoder
title_sort power consumption optimization technique in acs for space time trellis code viterbi decoder
publisher Trans Tech Publications
publishDate 2015
url http://psasir.upm.edu.my/id/eprint/45918/1/Power%20consumption%20optimization%20technique%20in%20ACS%20for%20space%20time%20trellis%20code%20viterbi%20decoder.pdf
_version_ 1782722214285541376
score 12.935284

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