Search Results - program paths processor implementation https https*

1

A Pipelined Multi-core MIPS Machine Hardware Implementation and Correctness Proof /

by Kovalev, Mikhail., Kovalev, Mikhail., Müller, Silvia M., Paul, Wolfgang J.
Published 2014

Table of Contents: “... -- Introducing CAS to the Sequential Processor -- Multi-core ISA and Reference Implementation -- Multi-core ISA...”
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2

Concurrent Programming: Algorithms, Principles, and Foundations

by Raynal, Michel., Raynal, Michel.
Published 2013

Subjects: “...Software Engineering/Programming and Operating Systems. https://scigraph.springernature.com...”
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3

Dynamically Reconfigurable Systems Architectures, Design Methods and Applications /

Published 2010

Table of Contents: “...—Dynamically Reconfigurable Coprocessor for Network Processors -- FlexPath NP—Flexible, Dynamically...”
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4

Advanced Techniques in Computing Sciences and Software Engineering

Published 2010

Table of Contents: “... Evaluation of Image Watermarking Algorithms -- Implementation of Efficient seamless non-broadcast Routing...”
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5

Advances in Computer Systems Architecture 11th Asia-Pacific Conference, ACSAC 2006, Shanghai, China, September 6-8, 2006, Proceedings /

Published 2006

Table of Contents: “... for Coordinating Data-Parallel Programs (Position Statement) -- Implementations of Square-Root and Exponential...”
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6

Reconfigurable Computing: Architectures, Tools, and Applications 4th International Workshop, ARC 2008, London, UK, March 26-28, 2008, Proceedings /

Published 2008

Table of Contents: “...Keynotes -- Synthesizing FPGA Circuits from Parallel Programs -- From Silicon to Science: The Long...”
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7

High-Performance Computing 6th International Symposium, ISHPC 2005, Nara, Japan, September 7-9, 2005, First International Workshop on Advance Low Power Systems, ALPS 2006, Revised...

Published 2008

Table of Contents: “... -- Exploiting Execution Locality with a Decoupled Kilo-Instruction Processor -- Decoupled State-Execute...”
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8

Algorithms and Architectures for Parallel Processing 10th International Conference, ICA3PP 2010, Busan, Korea, May 21-23, 2010. Proceedings, Part I /

Published 2010

Table of Contents: “... Algorithm for Chip Multiprocessor -- Efficient Partitioning of Static Buses for Processor Arrays of Small...”
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9

Hybrid Systems: Computation and Control 11th International Workshop, HSCC 2008, St. Louis, MO, USA, April 22-24, 2008, Proceedings /

Published 2008

Table of Contents: “... in Analysis of Graph Models of Software -- On the Optimality of Dubins Paths across Heterogeneous Terrain...”
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10

High Performance Computing – HiPC 2005 12th International Conference, Goa, India, December 18-21, 2005, Proceedings /

Published 2005

Table of Contents: “... Program Path Locality for Real-Time Embedded Systems -- Advanced Resource Management and Scheduling...”
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11

Languages and Compilers for High Performance Computing 17th International Workshop, LCPC 2004, West Lafayette, IN, USA, September 22-24, 2004, Revised Selected Papers /

Published 2005

Table of Contents: “... SPEC2000FP Benchmarks -- An Offline Approach for Whole-Program Paths Analysis Using Suffix Arrays...”
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12

Compiler Construction 14th International Conference, CC 2005, Held as Part of the Joint European Conferences on Theory and Practice of Software, ETAPS 2005, Edinburgh, UK, April 4-...

Published 2005

Table of Contents: “... Languages with Modest Programming Effort -- Compilation of Generic Regular Path Expressions Using C++ Class...”
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13

Evolvable Systems: From Biology to Hardware 7th International Conference, ICES 2007, Wuhan, China, September 21-23, 2007, Proceedings /

Published 2007

Table of Contents: “... Classification -- Design of Electronic Circuits Using a Divide-and-Conquer Approach -- Implementing Multi-VRC...”
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14

Power-Aware Computer Systems Third International Workshop, PACS 2003, San Diego, CA, USA, December 1, 2003, Revised Papers /

Published 2005

Table of Contents: “... -- Inter-program Compilation for Disk Energy Reduction -- Embedded Systems -- Energy Consumption in Mobile...”
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15

Algorithms and Architectures for Parallel Processing 10th International Conference, ICA3PP 2010, Busan, Korea, May 21-23, 2010. Workshops, Part II /

Published 2010

Table of Contents: “...) -- Efficient Grid on the OTIS-Arrangment Network -- Single Thread Program Parallelism with Dataflow Abstracting...”
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16

Algorithms and Architectures for Parallel Processing 8th International Conference, ICA3PP 2008, Agia Napa, Cyprus, June 9-11, 2008, Proceedings /

Published 2008

Table of Contents: “... -- An Operational Approach to Validate the Path of BGP -- 1-Persistent Collision-Free CSMA Protocols...”
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17

Automated Technology for Verification and Analysis Third International Symposium, ATVA 2005, Taipei, Taiwan, October 4-7, 2005, Proceedings /

Published 2005

Table of Contents: “... for Symmetric Multi-processor Architecture -- Comprehensive Verification Framework for Dependability of Self...”
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18

Distributed Computing and Networking 8th International Conference, ICDCN 2006, Guwahati, India, December 27-30, 2006, Proceedings /

Published 2006

Table of Contents: “... Framework to Measure Robustness of Peer-to-Peer Networks -- Design and Implementation of a Network Processor...”
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19

Image and Signal Processing 3rd International Conference, ICISP 2008, Cherbourg-Octeville, France, July 1-3, 2008, Proceedings /

Published 2008

Table of Contents: “... and Implementation of an Image CoProcessor -- Wavelet-Packet Identification of Dynamic Systems with Coloured...”
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20

High Performance Computing - HiPC 2004 11th International Conference, Bangalore, India, December 19-22, 2004, Proceedings /

Published 2005

Table of Contents: “... Point Using Intel’s IXP1200 Network Processor -- MuSeQoR: Multi-path Failure-Tolerant Security-Aware QoS...”
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