Routing Congestion in VLSI Circuits Estimation and Optimization /
With the dramatic increases in on-chip packing densities, routing congestion has become a major problem in chip design. The problem is especially acute as interconnects are also the performance bottleneck in integrated circuits. The solution lies in judicious resource management. This involves intel...
Сохранить в:
| Главные авторы: | , , |
|---|---|
| Соавтор: | |
| Формат: | Электронный ресурс eКнига |
| Язык: | English |
| Опубликовано: |
New York, NY :
Springer US : Imprint: Springer,
2007.
|
| Редактирование: | 1st ed. 2007. |
| Серии: | Integrated Circuits and Systems,
|
| Предметы: | |
| Online-ссылка: | https://doi.org/10.1007/0-387-48550-3 |
| Метки: |
Добавить метку
Нет меток, Требуется 1-ая метка записи!
|