Wafer Level 3-D ICs Process Technology
Wafer Level 3-D ICs Process Technology focuses on foundry-based process technology that enables the fabrication of 3-D ICs. The core of the book discusses alternative technology platforms for pre-packaging wafer level 3-D ICs, with an emphasis on wafer-to-wafer stacking. Driven by the need for impro...
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Corporate Author: | |
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Other Authors: | , , |
Format: | Electronic eBook |
Language: | English |
Published: |
New York, NY :
Springer US : Imprint: Springer,
2008.
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Edition: | 1st ed. 2008. |
Series: | Integrated Circuits and Systems,
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Subjects: | |
Online Access: | https://doi.org/10.1007/978-0-387-76534-1 |
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Summary: | Wafer Level 3-D ICs Process Technology focuses on foundry-based process technology that enables the fabrication of 3-D ICs. The core of the book discusses alternative technology platforms for pre-packaging wafer level 3-D ICs, with an emphasis on wafer-to-wafer stacking. Driven by the need for improved performance, a number of companies, consortia and universities are researching methods to use short, monolithically-fabricated, vertical interconnections to replace the long interconnects found in 2-D ICs. Stacking disparate technologies to provide various combinations of densely-packed functions, such as logic, memory, MEMS, displays, RF, mixed-signal, sensors, and power delivery is potentially possible with 3-D heterogeneous integration, making this technology the "Holy Grail" of system integration. Wafer Level 3-D ICs Process Technology is an edited book based on chapters contributed by various experts in the fields of wafer-level 3-D ICs process technology and applications enabled by 3-D integration. |
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Physical Description: | XII, 410 p. online resource. |
ISBN: | 9780387765341 |
ISSN: | 1558-9412 |